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drm/radeon/kms: fix up gart setup on rs600
Set up rs600 gart like r600: - set gart system aperture to vram - inside gart system aperture is unmapped* - outside gart system aperture is mapped* *mapped refers to memory handled by page tables Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -102,38 +102,38 @@ int rs600_gart_enable(struct radeon_device *rdev)
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WREG32_MC(R_000100_MC_PT0_CNTL,
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(S_000100_EFFECTIVE_L2_CACHE_SIZE(6) |
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S_000100_EFFECTIVE_L2_QUEUE_SIZE(6)));
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for (i = 0; i < 19; i++) {
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WREG32_MC(R_00016C_MC_PT0_CLIENT0_CNTL + i,
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S_00016C_ENABLE_TRANSLATION_MODE_OVERRIDE(1) |
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S_00016C_SYSTEM_ACCESS_MODE_MASK(
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V_00016C_SYSTEM_ACCESS_MODE_IN_SYS) |
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V_00016C_SYSTEM_ACCESS_MODE_NOT_IN_SYS) |
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S_00016C_SYSTEM_APERTURE_UNMAPPED_ACCESS(
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V_00016C_SYSTEM_APERTURE_UNMAPPED_DEFAULT_PAGE) |
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S_00016C_EFFECTIVE_L1_CACHE_SIZE(1) |
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V_00016C_SYSTEM_APERTURE_UNMAPPED_PASSTHROUGH) |
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S_00016C_EFFECTIVE_L1_CACHE_SIZE(3) |
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S_00016C_ENABLE_FRAGMENT_PROCESSING(1) |
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S_00016C_EFFECTIVE_L1_QUEUE_SIZE(1));
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S_00016C_EFFECTIVE_L1_QUEUE_SIZE(3));
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}
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/* System context map to GART space */
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WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.gtt_start);
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WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.gtt_end);
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/* enable first context */
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WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);
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WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);
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WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL,
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S_000102_ENABLE_PAGE_TABLE(1) |
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S_000102_PAGE_TABLE_DEPTH(V_000102_PAGE_TABLE_FLAT));
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/* disable all other contexts */
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for (i = 1; i < 8; i++) {
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for (i = 1; i < 8; i++)
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WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL + i, 0);
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}
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/* setup the page table */
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WREG32_MC(R_00012C_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,
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rdev->gart.table_addr);
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WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);
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WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);
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WREG32_MC(R_00011C_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);
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/* System context maps to VRAM space */
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WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);
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WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);
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/* enable page tables */
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tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
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WREG32_MC(R_000100_MC_PT0_CNTL, (tmp | S_000100_ENABLE_PT(1)));
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