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PCI: Spread interrupt vectors in pci_alloc_irq_vectors()
Set the affinity_mask in the PCI device before allocating vectors so that the affinity can be propagated through the MSI descriptor structures to the core IRQ code. To facilitate this, new __pci_enable_msi_range() and __pci_enable_msix_range() helpers are factored out of their not prefixed variants which assigning the new IRQ affinity mask in the PCI device so that the low-level interrupt code can perform the interrupt affinity assignment and do node-local allocations. A new PCI_IRQ_NOAFFINITY flag is added to pci_alloc_irq_vectors() so that this function can also be used by drivers that don't wish to use the automatic affinity assignment. [bhelgaas: omit "else" after "return" consistently] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alexander Gordeev <agordeev@redhat.com>
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@ -99,6 +99,10 @@ PCI_IRQ_NOMSI and PCI_IRQ_NOMSIX flag in case a device claims to support
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MSI or MSI-X, but the support is broken, or to pass PCI_IRQ_NOLEGACY in
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case the device does not support legacy interrupt lines.
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By default this function will spread the interrupts around the available
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CPUs, but this feature can be disabled by passing the PCI_IRQ_NOAFFINITY
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flag.
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To get the Linux IRQ numbers passed to request_irq() and free_irq() and the
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vectors, use the following function:
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@ -569,6 +569,7 @@ static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
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entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
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entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
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entry->nvec_used = nvec;
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entry->affinity = dev->irq_affinity;
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if (control & PCI_MSI_FLAGS_64BIT)
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entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
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@ -680,10 +681,18 @@ static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
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static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
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struct msix_entry *entries, int nvec)
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{
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const struct cpumask *mask = NULL;
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struct msi_desc *entry;
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int i;
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int cpu = -1, i;
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for (i = 0; i < nvec; i++) {
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if (dev->irq_affinity) {
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cpu = cpumask_next(cpu, dev->irq_affinity);
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if (cpu >= nr_cpu_ids)
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cpu = cpumask_first(dev->irq_affinity);
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mask = cpumask_of(cpu);
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}
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entry = alloc_msi_entry(&dev->dev);
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if (!entry) {
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if (!i)
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@ -703,6 +712,7 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
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entry->msi_attrib.default_irq = dev->irq;
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entry->mask_base = base;
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entry->nvec_used = 1;
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entry->affinity = mask;
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list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
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}
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@ -1028,19 +1038,8 @@ int pci_msi_enabled(void)
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}
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EXPORT_SYMBOL(pci_msi_enabled);
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/**
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* pci_enable_msi_range - configure device's MSI capability structure
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* @dev: device to configure
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* @minvec: minimal number of interrupts to configure
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* @maxvec: maximum number of interrupts to configure
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*
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* This function tries to allocate a maximum possible number of interrupts in a
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* range between @minvec and @maxvec. It returns a negative errno if an error
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* occurs. If it succeeds, it returns the actual number of interrupts allocated
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* and updates the @dev's irq member to the lowest new interrupt number;
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* the other interrupt numbers allocated to this device are consecutive.
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**/
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int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
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static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
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unsigned int flags)
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{
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int nvec;
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int rc;
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@ -1063,26 +1062,86 @@ int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
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nvec = pci_msi_vec_count(dev);
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if (nvec < 0)
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return nvec;
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else if (nvec < minvec)
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if (nvec < minvec)
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return -EINVAL;
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else if (nvec > maxvec)
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if (nvec > maxvec)
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nvec = maxvec;
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do {
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rc = msi_capability_init(dev, nvec);
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if (rc < 0) {
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return rc;
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} else if (rc > 0) {
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if (rc < minvec)
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for (;;) {
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if (!(flags & PCI_IRQ_NOAFFINITY)) {
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dev->irq_affinity = irq_create_affinity_mask(&nvec);
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if (nvec < minvec)
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return -ENOSPC;
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nvec = rc;
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}
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} while (rc);
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return nvec;
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rc = msi_capability_init(dev, nvec);
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if (rc == 0)
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return nvec;
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kfree(dev->irq_affinity);
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dev->irq_affinity = NULL;
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if (rc < 0)
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return rc;
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if (rc < minvec)
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return -ENOSPC;
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nvec = rc;
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}
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}
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/**
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* pci_enable_msi_range - configure device's MSI capability structure
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* @dev: device to configure
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* @minvec: minimal number of interrupts to configure
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* @maxvec: maximum number of interrupts to configure
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*
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* This function tries to allocate a maximum possible number of interrupts in a
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* range between @minvec and @maxvec. It returns a negative errno if an error
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* occurs. If it succeeds, it returns the actual number of interrupts allocated
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* and updates the @dev's irq member to the lowest new interrupt number;
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* the other interrupt numbers allocated to this device are consecutive.
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**/
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int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
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{
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return __pci_enable_msi_range(dev, minvec, maxvec, PCI_IRQ_NOAFFINITY);
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}
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EXPORT_SYMBOL(pci_enable_msi_range);
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static int __pci_enable_msix_range(struct pci_dev *dev,
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struct msix_entry *entries, int minvec, int maxvec,
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unsigned int flags)
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{
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int nvec = maxvec;
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int rc;
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if (maxvec < minvec)
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return -ERANGE;
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for (;;) {
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if (!(flags & PCI_IRQ_NOAFFINITY)) {
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dev->irq_affinity = irq_create_affinity_mask(&nvec);
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if (nvec < minvec)
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return -ENOSPC;
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}
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rc = pci_enable_msix(dev, entries, nvec);
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if (rc == 0)
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return nvec;
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kfree(dev->irq_affinity);
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dev->irq_affinity = NULL;
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if (rc < 0)
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return rc;
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if (rc < minvec)
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return -ENOSPC;
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nvec = rc;
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}
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}
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/**
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* pci_enable_msix_range - configure device's MSI-X capability structure
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* @dev: pointer to the pci_dev data structure of MSI-X device function
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@ -1099,26 +1158,10 @@ EXPORT_SYMBOL(pci_enable_msi_range);
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* with new allocated MSI-X interrupts.
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**/
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int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
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int minvec, int maxvec)
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int minvec, int maxvec)
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{
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int nvec = maxvec;
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int rc;
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if (maxvec < minvec)
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return -ERANGE;
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do {
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rc = pci_enable_msix(dev, entries, nvec);
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if (rc < 0) {
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return rc;
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} else if (rc > 0) {
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if (rc < minvec)
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return -ENOSPC;
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nvec = rc;
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}
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} while (rc);
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return nvec;
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return __pci_enable_msix_range(dev, entries, minvec, maxvec,
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PCI_IRQ_NOAFFINITY);
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}
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EXPORT_SYMBOL(pci_enable_msix_range);
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@ -1145,13 +1188,14 @@ int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
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int vecs = -ENOSPC;
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if (!(flags & PCI_IRQ_NOMSIX)) {
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vecs = pci_enable_msix_range(dev, NULL, min_vecs, max_vecs);
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vecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs,
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flags);
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if (vecs > 0)
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return vecs;
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}
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if (!(flags & PCI_IRQ_NOMSI)) {
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vecs = pci_enable_msi_range(dev, min_vecs, max_vecs);
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vecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, flags);
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if (vecs > 0)
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return vecs;
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}
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@ -320,6 +320,7 @@ struct pci_dev {
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* directly, use the values stored here. They might be different!
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*/
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unsigned int irq;
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struct cpumask *irq_affinity;
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struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
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bool match_driver; /* Skip attaching driver */
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@ -1240,6 +1241,7 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
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#define PCI_IRQ_NOLEGACY (1 << 0) /* don't use legacy interrupts */
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#define PCI_IRQ_NOMSI (1 << 1) /* don't use MSI interrupts */
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#define PCI_IRQ_NOMSIX (1 << 2) /* don't use MSI-X interrupts */
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#define PCI_IRQ_NOAFFINITY (1 << 3) /* don't auto-assign affinity */
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/* kmem_cache style wrapper around pci_alloc_consistent() */
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