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spi: cs42l43: Correct SPI root clock speed
The root clock is actually 49.152MHz not 40MHz, as it is derived from
the primary audio clock, update the driver to match. This error can
cause the actual clock rate to be higher than the requested clock rate
on the SPI bus.
Fixes: ef75e76716
("spi: cs42l43: Add SPI controller support")
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://msgid.link/r/20240604131704.3227500-1-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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parent
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@ -26,7 +26,7 @@
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#include <linux/units.h>
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#define CS42L43_FIFO_SIZE 16
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#define CS42L43_SPI_ROOT_HZ (40 * HZ_PER_MHZ)
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#define CS42L43_SPI_ROOT_HZ 49152000
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#define CS42L43_SPI_MAX_LENGTH 65532
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enum cs42l43_spi_cmd {
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