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MIPS: Add defs & probing of UFR
Add definitions and probing of the UFR bit in Config5. This bit allows user mode control of the FR bit (floating point register mode). It is present if the UFRP bit is set in the floating point implementation register. This is a capability KVM may want to expose to guest kernels, even though Linux is unlikely to ever use it due to the implications for multi-threaded programs. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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@ -444,6 +444,10 @@
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# define cpu_has_msa 0
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#endif
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#ifndef cpu_has_ufr
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# define cpu_has_ufr (cpu_data[0].options & MIPS_CPU_UFR)
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#endif
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#ifndef cpu_has_fre
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# define cpu_has_fre (cpu_data[0].options & MIPS_CPU_FRE)
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#endif
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@ -415,6 +415,7 @@ enum cpu_type_enum {
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#define MIPS_CPU_GUESTCTL2 MBIT_ULL(50) /* CPU has VZ GuestCtl2 register */
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#define MIPS_CPU_GUESTID MBIT_ULL(51) /* CPU uses VZ ASE GuestID feature */
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#define MIPS_CPU_DRG MBIT_ULL(52) /* CPU has VZ Direct Root to Guest (DRG) */
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#define MIPS_CPU_UFR MBIT_ULL(53) /* CPU supports User mode FR switching */
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/*
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* CPU ASE encodings
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@ -289,6 +289,8 @@ static void cpu_set_fpu_opts(struct cpuinfo_mips *c)
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MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6)) {
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if (c->fpu_id & MIPS_FPIR_3D)
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c->ases |= MIPS_ASE_MIPS3D;
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if (c->fpu_id & MIPS_FPIR_UFRP)
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c->options |= MIPS_CPU_UFR;
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if (c->fpu_id & MIPS_FPIR_FREP)
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c->options |= MIPS_CPU_FRE;
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}
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