ASoC: omap-mcbsp: Enable TX/RX under and overflow interrupts

FIFO under or overflow can cause channel swaps and data loss. Reporting
them can help to identify such events.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Peter Ujfalusi 2016-08-12 13:52:10 +03:00 committed by Mark Brown
parent 29b4817d40
commit 4e85e7776e

View File

@ -221,7 +221,8 @@ void omap_mcbsp_config(struct omap_mcbsp *mcbsp,
/* Enable TX/RX sync error interrupts by default */ /* Enable TX/RX sync error interrupts by default */
if (mcbsp->irq) if (mcbsp->irq)
MCBSP_WRITE(mcbsp, IRQEN, RSYNCERREN | XSYNCERREN); MCBSP_WRITE(mcbsp, IRQEN, RSYNCERREN | XSYNCERREN |
RUNDFLEN | ROVFLEN | XUNDFLEN | XOVFLEN);
} }
/** /**