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V4L/DVB (4451): MT2060: IF1 Offset from EEPROM, several updates
- AGC gain set to 3 - The tuning sequence has been changed to match the DibCom driver ( from I2C spy captures ) - For LITE-ON adapters : The IF1 frequency is now tuned according to the calibration values stored in EEPROM. Signed-off-by: Patrick Boettcher <pb@linuxtv.org> Signed-off-by: Olivier DANET <odanet@caramail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Patrick Boettcher
Mauro Carvalho Chehab
parent
d7357a53ef
commit
4de2730a1d
@ -234,12 +234,31 @@ EXPORT_SYMBOL(dibusb_dib3000mc_frontend_attach);
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int dibusb_dib3000mc_tuner_attach (struct dvb_usb_device *d)
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{
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int ret;
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u8 a,b;
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u16 if1=1220;
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if (d->tuner_pass_ctrl) {
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struct dibusb_state *st = d->priv;
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d->tuner_pass_ctrl(d->fe, 1, stk3000p_mt2060_config.i2c_address);
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/* check for mt2060 */
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if ((ret = mt2060_attach(&st->mt2060,&stk3000p_mt2060_config, &d->i2c_adap)) != 0) {
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// First IF calibration for Liteon Sticks
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if (d->udev->descriptor.idVendor == USB_VID_LITEON &&
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d->udev->descriptor.idProduct == USB_PID_LITEON_DVB_T_WARM) {
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dibusb_read_eeprom_byte(d,0x7E,&a);
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dibusb_read_eeprom_byte(d,0x7F,&b);
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if (a == 0xFF && b == 0xFF) {
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if1 = 1220;
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} else
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if (a == 0x00) {
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if1 = 1220+b;
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} else
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if (a == 0x80) {
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if1 = 1220-b;
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} else {
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warn("LITE-ON DVB-T Tuner : Strange IF1 calibration :%2X %2X\n",(int)a,(int)b);
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if1 = 1220;
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}
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}
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if ((ret = mt2060_attach(&st->mt2060,&stk3000p_mt2060_config, &d->i2c_adap,if1)) != 0) {
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/* not found - use panasonic pll parameters */
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d->pll_addr = 0x60;
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d->pll_desc = &dvb_pll_env57h1xd5;
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312
drivers/media/dvb/frontends/mt2060.c
Normal file
312
drivers/media/dvb/frontends/mt2060.c
Normal file
@ -0,0 +1,312 @@
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/*
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* Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
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*
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* Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
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*/
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/* See mt2060_priv.h for details */
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/* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/delay.h>
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#include <linux/dvb/frontend.h>
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#include "mt2060.h"
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#include "mt2060_priv.h"
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static int debug=0;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
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#define dprintk(args...) do { if (debug) printk(KERN_DEBUG "MT2060: " args); printk("\n"); } while (0)
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// Reads a single register
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static int mt2060_readreg(struct mt2060_state *state, u8 reg, u8 *val)
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{
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struct i2c_msg msg[2] = {
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{ .addr = state->config->i2c_address, .flags = 0, .buf = ®, .len = 1 },
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{ .addr = state->config->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 },
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};
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if (i2c_transfer(state->i2c, msg, 2) != 2) {
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printk(KERN_WARNING "mt2060 I2C read failed\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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// Writes a single register
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static int mt2060_writereg(struct mt2060_state *state, u8 reg, u8 val)
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{
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u8 buf[2];
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struct i2c_msg msg = {
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.addr = state->config->i2c_address, .flags = 0, .buf = buf, .len = 2
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};
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buf[0]=reg;
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buf[1]=val;
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if (i2c_transfer(state->i2c, &msg, 1) != 1) {
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printk(KERN_WARNING "mt2060 I2C write failed\n");
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return -EREMOTEIO;
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}
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return 0;
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}
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// Writes a set of consecutive registers
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static int mt2060_writeregs(struct mt2060_state *state,u8 *buf, u8 len)
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{
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struct i2c_msg msg = {
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.addr = state->config->i2c_address, .flags = 0, .buf = buf, .len = len
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};
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if (i2c_transfer(state->i2c, &msg, 1) != 1) {
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printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n",(int)len);
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return -EREMOTEIO;
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}
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return 0;
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}
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// Initialisation sequences
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// LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49
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static u8 mt2060_config1[] = {
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REG_LO1C1,
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0x3F, 0x74, 0x00, 0x08, 0x93
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};
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// FMCG=2, GP2=0, GP1=0
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static u8 mt2060_config2[] = {
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REG_MISC_CTRL,
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0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42
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};
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// VGAG=3, V1CSE=1
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static u8 mt2060_config3[] = {
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REG_VGAG,
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0x33
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};
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int mt2060_init(struct mt2060_state *state)
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{
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if (mt2060_writeregs(state,mt2060_config1,sizeof(mt2060_config1)))
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return -EREMOTEIO;
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if (mt2060_writeregs(state,mt2060_config3,sizeof(mt2060_config3)))
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return -EREMOTEIO;
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return 0;
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}
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EXPORT_SYMBOL(mt2060_init);
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#ifdef MT2060_SPURCHECK
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/* The function below calculates the frequency offset between the output frequency if2
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and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */
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static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2)
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{
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int I,J;
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int dia,diamin,diff;
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diamin=1000000;
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for (I = 1; I < 10; I++) {
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J = ((2*I*lo1)/lo2+1)/2;
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diff = I*(int)lo1-J*(int)lo2;
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if (diff < 0) diff=-diff;
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dia = (diff-(int)if2);
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if (dia < 0) dia=-dia;
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if (diamin > dia) diamin=dia;
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}
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return diamin;
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}
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#define BANDWIDTH 4000 // kHz
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/* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */
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static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
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{
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u32 Spur,Sp1,Sp2;
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int I,J;
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I=0;
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J=1000;
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Spur=mt2060_spurcalc(lo1,lo2,if2);
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if (Spur < BANDWIDTH) {
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/* Potential spurs detected */
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dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)",
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(int)lo1,(int)lo2);
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I=1000;
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Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2);
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Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2);
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if (Sp1 < Sp2) {
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J=-J; I=-I; Spur=Sp2;
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} else
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Spur=Sp1;
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while (Spur < BANDWIDTH) {
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I += J;
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Spur = mt2060_spurcalc(lo1+I,lo2+I,if2);
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}
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dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)",
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(int)(lo1+I),(int)(lo2+I));
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}
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return I;
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}
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#endif
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#define IF2 36150 // IF2 frequency = 36.150 MHz
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#define FREF 16000 // Quartz oscillator 16 MHz
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int mt2060_set(struct mt2060_state *state, struct dvb_frontend_parameters *fep)
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{
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int ret=0;
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int i=0;
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u32 freq;
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u8 lnaband;
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u32 f_lo1,f_lo2;
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u32 div1,num1,div2,num2;
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u8 b[8];
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u32 if1;
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if1 = state->if1_freq;
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b[0] = REG_LO1B1;
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b[1] = 0xFF;
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mt2060_writeregs(state,b,2);
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freq = fep->frequency / 1000; // Hz -> kHz
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f_lo1 = freq + if1 * 1000;
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f_lo1 = (f_lo1/250)*250;
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f_lo2 = f_lo1 - freq - IF2;
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f_lo2 = (f_lo2/50)*50;
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#ifdef MT2060_SPURCHECK
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// LO-related spurs detection and correction
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num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2);
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f_lo1 += num1;
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f_lo2 += num1;
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#endif
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//Frequency LO1 = 16MHz * (DIV1 + NUM1/64 )
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div1 = f_lo1 / FREF;
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num1 = (64 * (f_lo1 % FREF) )/FREF;
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// Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 )
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div2 = f_lo2 / FREF;
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num2 = (16384 * (f_lo2 % FREF) /FREF +1)/2;
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if (freq <= 95000) lnaband = 0xB0; else
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if (freq <= 180000) lnaband = 0xA0; else
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if (freq <= 260000) lnaband = 0x90; else
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if (freq <= 335000) lnaband = 0x80; else
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if (freq <= 425000) lnaband = 0x70; else
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if (freq <= 480000) lnaband = 0x60; else
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if (freq <= 570000) lnaband = 0x50; else
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if (freq <= 645000) lnaband = 0x40; else
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if (freq <= 730000) lnaband = 0x30; else
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if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10;
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b[0] = REG_LO1C1;
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b[1] = lnaband | ((num1 >>2) & 0x0F);
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b[2] = div1;
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b[3] = (num2 & 0x0F) | ((num1 & 3) << 4);
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b[4] = num2 >> 4;
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b[5] = ((num2 >>12) & 1) | (div2 << 1);
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dprintk("IF1: %dMHz",(int)if1);
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dprintk("PLL freq: %d f_lo1: %d f_lo2: %d (kHz)",(int)freq,(int)f_lo1,(int)f_lo2);
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dprintk("PLL div1: %d num1: %d div2: %d num2: %d",(int)div1,(int)num1,(int)div2,(int)num2);
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dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]);
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mt2060_writeregs(state,b,6);
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//Waits for pll lock or timeout
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i=0;
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do {
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mt2060_readreg(state,REG_LO_STATUS,b);
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if ((b[0] & 0x88)==0x88) break;
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msleep(4);
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i++;
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} while (i<10);
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return ret;
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}
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EXPORT_SYMBOL(mt2060_set);
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/* from usbsnoop.log */
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static void mt2060_calibrate(struct mt2060_state *state)
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{
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u8 b = 0;
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int i = 0;
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if (mt2060_writeregs(state,mt2060_config1,sizeof(mt2060_config1)))
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return;
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if (mt2060_writeregs(state,mt2060_config2,sizeof(mt2060_config2)))
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return;
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do {
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b |= (1 << 6); // FM1SS;
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mt2060_writereg(state, REG_LO2C1,b);
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msleep(20);
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if (i == 0) {
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b |= (1 << 7); // FM1CA;
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mt2060_writereg(state, REG_LO2C1,b);
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b &= ~(1 << 7); // FM1CA;
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msleep(20);
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}
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b &= ~(1 << 6); // FM1SS
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mt2060_writereg(state, REG_LO2C1,b);
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msleep(20);
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i++;
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} while (i < 9);
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i = 0;
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while (i++ < 10 && mt2060_readreg(state, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0)
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msleep(20);
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if (i < 10) {
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mt2060_readreg(state, REG_FM_FREQ, &state->fmfreq); // now find out, what is fmreq used for :)
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dprintk("calibration was successful: %d",state->fmfreq);
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} else
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dprintk("FMCAL timed out");
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}
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/* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
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int mt2060_attach(struct mt2060_state *state, struct mt2060_config *config, struct i2c_adapter *i2c,u16 if1)
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{
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u8 id = 0;
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memset(state,0,sizeof(struct mt2060_state));
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state->config = config;
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state->i2c = i2c;
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state->if1_freq = if1;
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if (mt2060_readreg(state,REG_PART_REV,&id) != 0)
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return -ENODEV;
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if (id != PART_REV)
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return -ENODEV;
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printk(KERN_INFO "MT2060: successfully identified\n");
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mt2060_calibrate(state);
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return 0;
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}
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EXPORT_SYMBOL(mt2060_attach);
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MODULE_AUTHOR("Olivier DANET");
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MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver");
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MODULE_LICENSE("GPL");
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44
drivers/media/dvb/frontends/mt2060.h
Normal file
44
drivers/media/dvb/frontends/mt2060.h
Normal file
@ -0,0 +1,44 @@
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/*
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* Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
|
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*
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* Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
|
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*
|
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
*
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
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*/
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#ifndef MT2060_H
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#define MT2060_H
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#include <linux/i2c.h>
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#include <linux/dvb/frontend.h>
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struct mt2060_config {
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u8 i2c_address;
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/* Shall we add settings for the discrete outputs ? */
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};
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struct mt2060_state {
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struct mt2060_config *config;
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struct i2c_adapter *i2c;
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u16 if1_freq;
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u8 fmfreq;
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};
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extern int mt2060_init(struct mt2060_state *state);
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extern int mt2060_set(struct mt2060_state *state, struct dvb_frontend_parameters *fep);
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extern int mt2060_attach(struct mt2060_state *state, struct mt2060_config *config, struct i2c_adapter *i2c,u16 if1);
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#endif
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95
drivers/media/dvb/frontends/mt2060_priv.h
Normal file
95
drivers/media/dvb/frontends/mt2060_priv.h
Normal file
@ -0,0 +1,95 @@
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/*
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* Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
|
||||
*
|
||||
* Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
*
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
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*/
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#ifndef MT2060_PRIV_H
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#define MT2060_PRIV_H
|
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|
||||
// Uncomment the #define below to enable spurs checking. The results where quite unconvincing.
|
||||
// #define MT2060_SPURCHECK
|
||||
|
||||
/* This driver is based on the information available in the datasheet of the
|
||||
"Comtech SDVBT-3K6M" tuner ( K1000737843.pdf ) which features the MT2060 register map :
|
||||
|
||||
I2C Address : 0x60
|
||||
|
||||
Reg.No | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | ( defaults )
|
||||
--------------------------------------------------------------------------------
|
||||
00 | [ PART ] | [ REV ] | R = 0x63
|
||||
01 | [ LNABAND ] | [ NUM1(5:2) ] | RW = 0x3F
|
||||
02 | [ DIV1 ] | RW = 0x74
|
||||
03 | FM1CA | FM1SS | [ NUM1(1:0) ] | [ NUM2(3:0) ] | RW = 0x00
|
||||
04 | NUM2(11:4) ] | RW = 0x08
|
||||
05 | [ DIV2 ] |NUM2(12)| RW = 0x93
|
||||
06 | L1LK | [ TAD1 ] | L2LK | [ TAD2 ] | R
|
||||
07 | [ FMF ] | R
|
||||
08 | ? | FMCAL | ? | ? | ? | ? | ? | TEMP | R
|
||||
09 | 0 | 0 | [ FMGC ] | 0 | GP02 | GP01 | 0 | RW = 0x20
|
||||
0A | ??
|
||||
0B | 0 | 0 | 1 | 1 | 0 | 0 | [ VGAG ] | RW = 0x30
|
||||
0C | V1CSE | 1 | 1 | 1 | 1 | 1 | 1 | 1 | RW = 0xFF
|
||||
0D | 1 | 0 | [ V1CS ] | RW = 0xB0
|
||||
0E | ??
|
||||
0F | ??
|
||||
10 | ??
|
||||
11 | [ LOTO ] | 0 | 0 | 1 | 0 | RW = 0x42
|
||||
|
||||
PART : Part code : 6 for MT2060
|
||||
REV : Revision code : 3 for current revision
|
||||
LNABAND : Input frequency range : ( See code for details )
|
||||
NUM1 / DIV1 / NUM2 / DIV2 : Frequencies programming ( See code for details )
|
||||
FM1CA : Calibration Start Bit
|
||||
FM1SS : Calibration Single Step bit
|
||||
L1LK : LO1 Lock Detect
|
||||
TAD1 : Tune Line ADC ( ? )
|
||||
L2LK : LO2 Lock Detect
|
||||
TAD2 : Tune Line ADC ( ? )
|
||||
FMF : Estimated first IF Center frequency Offset ( ? )
|
||||
FM1CAL : Calibration done bit
|
||||
TEMP : On chip temperature sensor
|
||||
FMCG : Mixer 1 Cap Gain ( ? )
|
||||
GP01 / GP02 : Programmable digital outputs. Unconnected pins ?
|
||||
V1CSE : LO1 VCO Automatic Capacitor Select Enable ( ? )
|
||||
V1CS : LO1 Capacitor Selection Value ( ? )
|
||||
LOTO : LO Timeout ( ? )
|
||||
VGAG : Tuner Output gain
|
||||
*/
|
||||
|
||||
#define I2C_ADDRESS 0x60
|
||||
|
||||
#define REG_PART_REV 0
|
||||
#define REG_LO1C1 1
|
||||
#define REG_LO1C2 2
|
||||
#define REG_LO2C1 3
|
||||
#define REG_LO2C2 4
|
||||
#define REG_LO2C3 5
|
||||
#define REG_LO_STATUS 6
|
||||
#define REG_FM_FREQ 7
|
||||
#define REG_MISC_STAT 8
|
||||
#define REG_MISC_CTRL 9
|
||||
#define REG_RESERVED_A 0x0A
|
||||
#define REG_VGAG 0x0B
|
||||
#define REG_LO1B1 0x0C
|
||||
#define REG_LO1B2 0x0D
|
||||
#define REG_LOTO 0x11
|
||||
|
||||
#define PART_REV 0x63 // The current driver works only with PART=6 and REV=3 chips
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user