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staging: comedi: ni_at_ao: rename the rest of the register map
For aesthetics, rename the remaining register map defines so they follow the same format as the ones already renamed. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -86,18 +86,17 @@ Configuration options:
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#define ATAO_STATUS_INT1 (1 << 2)
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#define ATAO_STATUS_TCINT (1 << 1)
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#define ATAO_STATUS_PROMOUT (1 << 0)
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#define ATAO_FIFO_WRITE 0x0c /* W 16 */
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#define ATAO_FIFO_CLEAR 0x0c /* R 16 */
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#define ATAO_DACn(x) (0x0c + ((x) * 2)) /* W */
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#define ATAO_FIFO_WRITE_REG 0x0c
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#define ATAO_FIFO_CLEAR_REG 0x0c
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#define ATAO_AO_REG(x) (0x0c + ((x) * 2))
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/* registers with _2_ are accessed when GRP2WR is set in CFG1 */
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#define ATAO_2_DMATCCLR 0x00 /* W 16 */
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#define ATAO_2_INT1CLR 0x02 /* W 16 */
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#define ATAO_2_INT2CLR 0x04 /* W 16 */
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#define ATAO_2_RTSISHFT 0x06 /* W 8 */
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#define ATAO_RTSISHFT_RSI (1 << 0)
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#define ATAO_2_RTSISTRB 0x07 /* W 8 */
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#define ATAO_2_DMATCCLR_REG 0x00
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#define ATAO_2_INT1CLR_REG 0x02
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#define ATAO_2_INT2CLR_REG 0x04
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#define ATAO_2_RTSISHFT_REG 0x06
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#define ATAO_2_RTSISHFT_RSI (1 << 0)
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#define ATAO_2_RTSISTRB_REG 0x07
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/*
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* Board descriptions for two imaginary boards. Describing the
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@ -140,14 +139,14 @@ static void atao_reset(struct comedi_device *dev)
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devpriv->cfg3 = 0;
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outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG);
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inw(dev->iobase + ATAO_FIFO_CLEAR);
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inw(dev->iobase + ATAO_FIFO_CLEAR_REG);
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devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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outw(0, dev->iobase + ATAO_2_INT1CLR);
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outw(0, dev->iobase + ATAO_2_INT2CLR);
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outw(0, dev->iobase + ATAO_2_DMATCCLR);
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outw(0, dev->iobase + ATAO_2_INT1CLR_REG);
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outw(0, dev->iobase + ATAO_2_INT2CLR_REG);
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outw(0, dev->iobase + ATAO_2_DMATCCLR_REG);
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devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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@ -167,7 +166,7 @@ static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
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devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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}
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outw(bits, dev->iobase + ATAO_DACn(chan));
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outw(bits, dev->iobase + ATAO_AO_REG(chan));
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if (chan == 0) {
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devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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