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ARM: Remove ARMv3 support from decompressor
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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357c9c1f07
commit
4cdfc2ec72
@ -680,18 +680,6 @@ __fa526_cache_on:
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mcr p15, 0, r0, c8, c7, 0 @ flush UTLB
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mov pc, r12
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__arm6_mmu_cache_on:
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mov r12, lr
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bl __setup_mmu
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mov r0, #0
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mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
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mcr p15, 0, r0, c5, c0, 0 @ invalidate whole TLB v3
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mov r0, #0x30
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bl __common_mmu_cache_on
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mov r0, #0
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mcr p15, 0, r0, c5, c0, 0 @ invalidate whole TLB v3
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mov pc, r12
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__common_mmu_cache_on:
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#ifndef CONFIG_THUMB2_KERNEL
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#ifndef DEBUG
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@ -756,16 +744,6 @@ call_cache_fn: adr r12, proc_types
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.align 2
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.type proc_types,#object
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proc_types:
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.word 0x41560600 @ ARM6/610
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.word 0xffffffe0
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W(b) __arm6_mmu_cache_off @ works, but slow
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W(b) __arm6_mmu_cache_off
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mov pc, lr
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THUMB( nop )
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@ b __arm6_mmu_cache_on @ untested
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@ b __arm6_mmu_cache_off
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@ b __armv3_mmu_cache_flush
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.word 0x00000000 @ old ARM ID
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.word 0x0000f000
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mov pc, lr
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@ -777,8 +755,10 @@ proc_types:
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.word 0x41007000 @ ARM7/710
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.word 0xfff8fe00
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W(b) __arm7_mmu_cache_off
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W(b) __arm7_mmu_cache_off
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mov pc, lr
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THUMB( nop )
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mov pc, lr
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THUMB( nop )
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mov pc, lr
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THUMB( nop )
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@ -977,21 +957,6 @@ __armv7_mmu_cache_off:
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mcr p15, 0, r0, c7, c5, 4 @ ISB
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mov pc, r12
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__arm6_mmu_cache_off:
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mov r0, #0x00000030 @ ARM6 control reg.
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b __armv3_mmu_cache_off
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__arm7_mmu_cache_off:
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mov r0, #0x00000070 @ ARM7 control reg.
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b __armv3_mmu_cache_off
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__armv3_mmu_cache_off:
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mcr p15, 0, r0, c1, c0, 0 @ turn MMU and cache off
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mov r0, #0
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mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
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mcr p15, 0, r0, c5, c0, 0 @ invalidate whole TLB v3
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mov pc, lr
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/*
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* Clean and flush the cache to maintain consistency.
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*
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