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mtd: omap2: fix some typos in comments
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -347,7 +347,7 @@ static void omap_nand_dma_callback(void *data)
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}
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/*
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* omap_nand_dma_transfer: configer and start dma transfer
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* omap_nand_dma_transfer: configure and start dma transfer
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* @mtd: MTD device structure
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* @addr: virtual address in RAM of source/destination
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* @len: number of data bytes to be transferred
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@ -463,7 +463,7 @@ static void omap_write_buf_dma_pref(struct mtd_info *mtd,
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}
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/*
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* omap_nand_irq - GMPC irq handler
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* omap_nand_irq - GPMC irq handler
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* @this_irq: gpmc irq number
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* @dev: omap_nand_info structure pointer is passed here
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*/
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@ -1205,8 +1205,8 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
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/*
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* If RDY/BSY line is connected to OMAP then use the omap ready
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* funcrtion and the generic nand_wait function which reads the status
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* register after monitoring the RDY/BSY line.Otherwise use a standard
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* function and the generic nand_wait function which reads the status
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* register after monitoring the RDY/BSY line. Otherwise use a standard
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* chip delay which is slightly more than tR (AC Timing) of the NAND
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* device and read status register until you get a failure or success
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*/
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@ -1287,7 +1287,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
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info->nand.verify_buf = omap_verify_buf;
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/* selsect the ecc type */
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/* select the ecc type */
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if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
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info->nand.ecc.mode = NAND_ECC_SOFT;
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else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
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