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soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
The ARMv8 zx2967 family (296718, 296716 etc) uses different value for controlling the power domain on/off registers, Choose the value depending on the compatible. Multiple domains are prepared for the family, this patch prepares the common functions. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -11,5 +11,6 @@ source "drivers/soc/tegra/Kconfig"
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source "drivers/soc/ti/Kconfig"
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source "drivers/soc/ux500/Kconfig"
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source "drivers/soc/versatile/Kconfig"
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source "drivers/soc/zte/Kconfig"
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endmenu
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@ -16,3 +16,4 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_SOC_TI) += ti/
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obj-$(CONFIG_ARCH_U8500) += ux500/
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obj-$(CONFIG_PLAT_VERSATILE) += versatile/
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obj-$(CONFIG_ARCH_ZX) += zte/
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13
drivers/soc/zte/Kconfig
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13
drivers/soc/zte/Kconfig
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@ -0,0 +1,13 @@
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#
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# ZTE SoC drivers
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#
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menuconfig SOC_ZTE
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bool "ZTE SoC driver support"
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if SOC_ZTE
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config ZX2967_PM_DOMAINS
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bool "ZX2967 PM domains"
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depends on PM_GENERIC_DOMAINS
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endif
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4
drivers/soc/zte/Makefile
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4
drivers/soc/zte/Makefile
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@ -0,0 +1,4 @@
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#
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# ZTE SOC drivers
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#
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obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx2967_pm_domains.o
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143
drivers/soc/zte/zx2967_pm_domains.c
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143
drivers/soc/zte/zx2967_pm_domains.c
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@ -0,0 +1,143 @@
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/*
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* Copyright (C) 2017 ZTE Ltd.
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*
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* Author: Baoyou Xie <baoyou.xie@linaro.org>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include "zx2967_pm_domains.h"
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#define PCU_DM_CLKEN(zpd) ((zpd)->reg_offset[REG_CLKEN])
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#define PCU_DM_ISOEN(zpd) ((zpd)->reg_offset[REG_ISOEN])
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#define PCU_DM_RSTEN(zpd) ((zpd)->reg_offset[REG_RSTEN])
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#define PCU_DM_PWREN(zpd) ((zpd)->reg_offset[REG_PWREN])
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#define PCU_DM_ACK_SYNC(zpd) ((zpd)->reg_offset[REG_ACK_SYNC])
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static void __iomem *pcubase;
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static int zx2967_power_on(struct generic_pm_domain *domain)
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{
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struct zx2967_pm_domain *zpd = (struct zx2967_pm_domain *)domain;
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unsigned long loop = 1000;
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u32 val;
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val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
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if (zpd->polarity == PWREN)
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val |= BIT(zpd->bit);
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else
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val &= ~BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
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do {
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udelay(1);
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val = readl_relaxed(pcubase + PCU_DM_ACK_SYNC(zpd))
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& BIT(zpd->bit);
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} while (--loop && !val);
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if (!loop) {
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pr_err("Error: %s %s fail\n", __func__, domain->name);
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return -EIO;
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}
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val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
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val |= BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
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udelay(5);
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val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
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val &= ~BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
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udelay(5);
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val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
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val |= BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
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udelay(5);
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pr_debug("poweron %s\n", domain->name);
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return 0;
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}
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static int zx2967_power_off(struct generic_pm_domain *domain)
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{
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struct zx2967_pm_domain *zpd = (struct zx2967_pm_domain *)domain;
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unsigned long loop = 1000;
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u32 val;
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val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
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val &= ~BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
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udelay(5);
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val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
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val |= BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
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udelay(5);
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val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
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val &= ~BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
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udelay(5);
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val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
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if (zpd->polarity == PWREN)
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val &= ~BIT(zpd->bit);
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else
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val |= BIT(zpd->bit);
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writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
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do {
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udelay(1);
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val = readl_relaxed(pcubase + PCU_DM_ACK_SYNC(zpd))
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& BIT(zpd->bit);
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} while (--loop && val);
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if (!loop) {
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pr_err("Error: %s %s fail\n", __func__, domain->name);
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return -EIO;
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}
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pr_debug("poweroff %s\n", domain->name);
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return 0;
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}
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int zx2967_pd_probe(struct platform_device *pdev,
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struct generic_pm_domain **zx_pm_domains,
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int domain_num)
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{
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struct genpd_onecell_data *genpd_data;
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struct resource *res;
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int i;
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genpd_data = devm_kzalloc(&pdev->dev, sizeof(*genpd_data), GFP_KERNEL);
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if (!genpd_data)
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return -ENOMEM;
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genpd_data->domains = zx_pm_domains;
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genpd_data->num_domains = domain_num;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pcubase = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(pcubase)) {
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dev_err(&pdev->dev, "ioremap fail.\n");
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return PTR_ERR(pcubase);
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}
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for (i = 0; i < domain_num; ++i) {
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zx_pm_domains[i]->power_on = zx2967_power_on;
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zx_pm_domains[i]->power_off = zx2967_power_off;
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pm_genpd_init(zx_pm_domains[i], NULL, false);
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}
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of_genpd_add_provider_onecell(pdev->dev.of_node, genpd_data);
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dev_info(&pdev->dev, "powerdomain init ok\n");
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return 0;
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}
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44
drivers/soc/zte/zx2967_pm_domains.h
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44
drivers/soc/zte/zx2967_pm_domains.h
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@ -0,0 +1,44 @@
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/*
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* Header for ZTE's Power Domain Driver support
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*
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* Copyright (C) 2017 ZTE Ltd.
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*
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* Author: Baoyou Xie <baoyou.xie@linaro.org>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef __ZTE_ZX2967_PM_DOMAIN_H
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#define __ZTE_ZX2967_PM_DOMAIN_H
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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enum {
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REG_CLKEN,
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REG_ISOEN,
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REG_RSTEN,
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REG_PWREN,
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REG_PWRDN,
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REG_ACK_SYNC,
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/* The size of the array - must be last */
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REG_ARRAY_SIZE,
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};
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enum zx2967_power_polarity {
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PWREN,
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PWRDN,
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};
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struct zx2967_pm_domain {
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struct generic_pm_domain dm;
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const u16 bit;
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const enum zx2967_power_polarity polarity;
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const u16 *reg_offset;
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};
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int zx2967_pd_probe(struct platform_device *pdev,
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struct generic_pm_domain **zx_pm_domains,
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int domain_num);
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#endif /* __ZTE_ZX2967_PM_DOMAIN_H */
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