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mtd: denali: Remove unuseful code in get_xx_nand_para functions
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -370,63 +370,9 @@ static void set_ecc_config(struct denali_nand_info *denali)
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static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
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{
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int i;
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denali_write32(DEVICE_RESET__BANK0, denali->flash_reg + DEVICE_RESET);
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while (!((ioread32(denali->flash_reg + INTR_STATUS0) &
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INTR_STATUS0__RST_COMP) |
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(ioread32(denali->flash_reg + INTR_STATUS0) &
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INTR_STATUS0__TIME_OUT)))
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;
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if (ioread32(denali->flash_reg + INTR_STATUS0) &
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INTR_STATUS0__RST_COMP) {
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denali_write32(DEVICE_RESET__BANK1,
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denali->flash_reg + DEVICE_RESET);
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while (!((ioread32(denali->flash_reg + INTR_STATUS1) &
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INTR_STATUS1__RST_COMP) |
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(ioread32(denali->flash_reg + INTR_STATUS1) &
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INTR_STATUS1__TIME_OUT)))
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;
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if (ioread32(denali->flash_reg + INTR_STATUS1) &
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INTR_STATUS1__RST_COMP) {
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denali_write32(DEVICE_RESET__BANK2,
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denali->flash_reg + DEVICE_RESET);
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while (!((ioread32(denali->flash_reg + INTR_STATUS2) &
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INTR_STATUS2__RST_COMP) |
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(ioread32(denali->flash_reg + INTR_STATUS2) &
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INTR_STATUS2__TIME_OUT)))
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;
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if (ioread32(denali->flash_reg + INTR_STATUS2) &
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INTR_STATUS2__RST_COMP) {
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denali_write32(DEVICE_RESET__BANK3,
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denali->flash_reg + DEVICE_RESET);
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while (!((ioread32(denali->flash_reg +
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INTR_STATUS3) &
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INTR_STATUS3__RST_COMP) |
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(ioread32(denali->flash_reg +
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INTR_STATUS3) &
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INTR_STATUS3__TIME_OUT)))
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;
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} else {
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printk(KERN_ERR "Getting a time out for bank 2!\n");
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}
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} else {
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printk(KERN_ERR "Getting a time out for bank 1!\n");
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}
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}
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denali_write32(INTR_STATUS0__TIME_OUT,
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denali->flash_reg + INTR_STATUS0);
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denali_write32(INTR_STATUS1__TIME_OUT,
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denali->flash_reg + INTR_STATUS1);
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denali_write32(INTR_STATUS2__TIME_OUT,
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denali->flash_reg + INTR_STATUS2);
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denali_write32(INTR_STATUS3__TIME_OUT,
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denali->flash_reg + INTR_STATUS3);
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/* we needn't to do a reset here because driver has already
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* reset all the banks before
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* */
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if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) &
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ONFI_TIMING_MODE__VALUE))
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return FAIL;
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@ -447,23 +393,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
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return PASS;
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}
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static void get_samsung_nand_para(struct denali_nand_info *denali)
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static void get_samsung_nand_para(struct denali_nand_info *denali,
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uint8_t device_id)
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{
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uint32_t id_bytes[5];
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int i;
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index_addr(denali, (uint32_t)(MODE_11 | 0), 0x90);
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index_addr(denali, (uint32_t)(MODE_11 | 1), 0);
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for (i = 0; i < 5; i++)
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index_addr_read_data(denali, (uint32_t)(MODE_11 | 2),
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&id_bytes[i]);
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nand_dbg_print(NAND_DBG_DEBUG,
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"ID bytes: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
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id_bytes[0], id_bytes[1], id_bytes[2],
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id_bytes[3], id_bytes[4]);
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if ((id_bytes[1] & 0xff) == 0xd3) { /* Samsung K9WAG08U1A */
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if (device_id == 0xd3) { /* Samsung K9WAG08U1A */
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/* Set timing register values according to datasheet */
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denali_write32(5, denali->flash_reg + ACC_CLKS);
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denali_write32(20, denali->flash_reg + RE_2_WE);
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@ -625,7 +558,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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if (FAIL == get_onfi_nand_para(denali))
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return FAIL;
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} else if (maf_id == 0xEC) { /* Samsung NAND */
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get_samsung_nand_para(denali);
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get_samsung_nand_para(denali, device_id);
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} else if (maf_id == 0x98) { /* Toshiba NAND */
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get_toshiba_nand_para(denali);
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} else if (maf_id == 0xAD) { /* Hynix NAND */
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