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Get rid of SINGLE_ONLY_FPU. Linux does not support half FPU other than
by emulation of a full FPU. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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3fccc0150e
commit
4b724efdde
@ -256,7 +256,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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emul:
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fpuemustats.emulated++;
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switch (MIPSInst_OPCODE(ir)) {
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#ifndef SINGLE_ONLY_FPU
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case ldc1_op:{
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u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
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MIPSInst_SIMM(ir));
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@ -284,7 +283,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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}
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break;
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}
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#endif
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case lwc1_op:{
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u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
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@ -296,12 +294,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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fpuemustats.errors++;
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return SIGBUS;
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}
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_RT(ir) & 1) {
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/* illegal register in single-float mode */
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return SIGILL;
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}
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#endif
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SITOREG(val, MIPSInst_RT(ir));
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break;
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}
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@ -312,12 +304,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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u32 val;
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fpuemustats.stores++;
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_RT(ir) & 1) {
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/* illegal register in single-float mode */
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return SIGILL;
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}
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#endif
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SIFROMREG(val, MIPSInst_RT(ir));
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if (put_user(val, va)) {
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fpuemustats.errors++;
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@ -329,7 +315,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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case cop1_op:
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switch (MIPSInst_RS(ir)) {
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#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
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#if defined(__mips64)
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case dmfc_op:
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/* copregister fs -> gpr[rt] */
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if (MIPSInst_RT(ir) != 0) {
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@ -346,12 +332,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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case mfc_op:
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/* copregister rd -> gpr[rt] */
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_RD(ir) & 1) {
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/* illegal register in single-float mode */
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return SIGILL;
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}
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#endif
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if (MIPSInst_RT(ir) != 0) {
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SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
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MIPSInst_RD(ir));
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@ -360,12 +340,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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case mtc_op:
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/* copregister rd <- rt */
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_RD(ir) & 1) {
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/* illegal register in single-float mode */
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return SIGILL;
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}
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#endif
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SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
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break;
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@ -467,7 +441,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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switch (MIPSInst_OPCODE(ir)) {
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case lwc1_op:
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case swc1_op:
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#if (__mips >= 2 || defined(__mips64)) && !defined(SINGLE_ONLY_FPU)
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#if (__mips >= 2 || defined(__mips64))
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case ldc1_op:
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case sdc1_op:
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#endif
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@ -646,14 +620,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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fpuemustats.errors++;
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return SIGBUS;
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}
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_FD(ir) & 1) {
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/* illegal register in single-float
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* mode
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*/
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return SIGILL;
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}
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#endif
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SITOREG(val, MIPSInst_FD(ir));
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break;
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@ -662,14 +628,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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xcp->regs[MIPSInst_FT(ir)]);
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fpuemustats.stores++;
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_FS(ir) & 1) {
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/* illegal register in single-float
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* mode
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*/
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return SIGILL;
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}
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#endif
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SIFROMREG(val, MIPSInst_FS(ir));
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if (put_user(val, va)) {
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@ -723,7 +681,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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break;
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}
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#ifndef SINGLE_ONLY_FPU
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case d_fmt:{ /* 1 */
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ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp);
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ieee754dp fd, fr, fs, ft;
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@ -781,7 +738,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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}
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break;
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}
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#endif
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case 0x7: /* 7 */
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if (MIPSInst_FUNC(ir) != pfetch_op) {
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@ -921,9 +877,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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case fcvts_op:
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return SIGILL; /* not defined */
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case fcvtd_op:{
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#ifdef SINGLE_ONLY_FPU
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return SIGILL; /* not defined */
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#else
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ieee754sp fs;
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SPFROMREG(fs, MIPSInst_FS(ir));
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@ -931,7 +884,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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rfmt = d_fmt;
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goto copcsr;
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}
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#endif
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case fcvtw_op:{
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ieee754sp fs;
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@ -958,7 +910,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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}
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#endif /* __mips >= 2 */
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#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
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#if defined(__mips64)
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case fcvtl_op:{
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ieee754sp fs;
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@ -982,7 +934,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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rfmt = l_fmt;
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goto copcsr;
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}
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#endif /* defined(__mips64) && !fpu(single) */
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#endif /* defined(__mips64) */
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default:
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if (MIPSInst_FUNC(ir) >= fcmp_op) {
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@ -1009,7 +961,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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break;
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}
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#ifndef SINGLE_ONLY_FPU
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case d_fmt:{
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union {
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ieee754dp(*b) (ieee754dp, ieee754dp);
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@ -1133,7 +1084,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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}
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#endif
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#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
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#if defined(__mips64)
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case fcvtl_op:{
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ieee754dp fs;
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@ -1157,7 +1108,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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rfmt = l_fmt;
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goto copcsr;
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}
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#endif /* __mips >= 3 && !fpu(single) */
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#endif /* __mips >= 3 */
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default:
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if (MIPSInst_FUNC(ir) >= fcmp_op) {
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@ -1185,7 +1136,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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}
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break;
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}
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#endif /* ifndef SINGLE_ONLY_FPU */
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case w_fmt:{
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ieee754sp fs;
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@ -1197,21 +1147,19 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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rv.s = ieee754sp_fint(fs.bits);
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rfmt = s_fmt;
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goto copcsr;
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#ifndef SINGLE_ONLY_FPU
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case fcvtd_op:
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/* convert word to double precision real */
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SPFROMREG(fs, MIPSInst_FS(ir));
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rv.d = ieee754dp_fint(fs.bits);
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rfmt = d_fmt;
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goto copcsr;
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#endif
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default:
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return SIGILL;
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}
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break;
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}
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#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
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#if defined(__mips64)
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case l_fmt:{
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switch (MIPSInst_FUNC(ir)) {
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case fcvts_op:
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@ -1264,18 +1212,16 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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ctx->fcr31 &= ~cond;
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break;
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}
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#ifndef SINGLE_ONLY_FPU
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case d_fmt:
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DPTOREG(rv.d, MIPSInst_FD(ir));
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break;
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#endif
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case s_fmt:
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SPTOREG(rv.s, MIPSInst_FD(ir));
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break;
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case w_fmt:
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SITOREG(rv.w, MIPSInst_FD(ir));
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break;
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#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
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#if defined(__mips64)
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case l_fmt:
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DITOREG(rv.l, MIPSInst_FD(ir));
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break;
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