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drm/i915: replace intel_infoframe_freq with VIDEO_DIP_FREQ_VSYNC

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Simplifies things because for all the infoframes we care about,
we always send them on each vblank. Also, this gets rid of one
of the hw specific functions mislabelled with the intel_ prefix -
hsw will completely change how this works!

Acked-by: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2012-05-08 14:41:00 +02:00
parent acb87dfb4b
commit 4b24c9331a
1 changed files with 4 additions and 21 deletions
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25
drivers/gpu/drm/i915/intel_hdmi.c
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@ -113,23 +113,6 @@ static u32 intel_infoframe_enable(struct dip_infoframe *frame)
return flags; return flags;
} }
static u32 intel_infoframe_frequency(struct dip_infoframe *frame)
{
u32 flags = 0;
switch (frame->type) {
case DIP_TYPE_AVI:
case DIP_TYPE_SPD:
flags |= VIDEO_DIP_FREQ_VSYNC;
break;
default:
DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
break;
}
return flags;
}
static void i9xx_write_infoframe(struct drm_encoder *encoder, static void i9xx_write_infoframe(struct drm_encoder *encoder,
struct dip_infoframe *frame) struct dip_infoframe *frame)
{ {
@ -165,7 +148,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder,
val |= intel_infoframe_enable(frame); val |= intel_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK; val &= ~VIDEO_DIP_FREQ_MASK;
val |= intel_infoframe_frequency(frame); val |= VIDEO_DIP_FREQ_VSYNC;
I915_WRITE(VIDEO_DIP_CTL, val); I915_WRITE(VIDEO_DIP_CTL, val);
} }
@ -215,7 +198,7 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
val |= intel_infoframe_enable(frame); val |= intel_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK; val &= ~VIDEO_DIP_FREQ_MASK;
val |= intel_infoframe_frequency(frame); val |= VIDEO_DIP_FREQ_VSYNC;
I915_WRITE(reg, val); I915_WRITE(reg, val);
} }
@ -255,7 +238,7 @@ static void cpt_write_infoframe(struct drm_encoder *encoder,
val |= intel_infoframe_enable(frame); val |= intel_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK; val &= ~VIDEO_DIP_FREQ_MASK;
val |= intel_infoframe_frequency(frame); val |= VIDEO_DIP_FREQ_VSYNC;
I915_WRITE(reg, val); I915_WRITE(reg, val);
} }
@ -289,7 +272,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
val |= intel_infoframe_enable(frame); val |= intel_infoframe_enable(frame);
val &= ~VIDEO_DIP_FREQ_MASK; val &= ~VIDEO_DIP_FREQ_MASK;
val |= intel_infoframe_frequency(frame); val |= VIDEO_DIP_FREQ_VSYNC;
I915_WRITE(reg, val); I915_WRITE(reg, val);
} }