Freescale updates from Scott:

"Contains fixes for CPM GPIO and an FSL PCI erratum workaround, plus a
 minor cleanup patch."
This commit is contained in:
Michael Ellerman 2018-01-21 23:32:02 +11:00
commit 4afa0f3a89
8 changed files with 99 additions and 43 deletions

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@ -166,6 +166,6 @@ static inline int cpm_command(u32 command, u8 opcode)
}
#endif /* CONFIG_CPM */
int cpm2_gpiochip_add32(struct device_node *np);
int cpm2_gpiochip_add32(struct device *dev);
#endif

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@ -605,5 +605,7 @@ enum cpm_clk {
};
int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode);
int cpm1_gpiochip_add16(struct device *dev);
int cpm1_gpiochip_add32(struct device *dev);
#endif /* __CPM1__ */

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@ -43,7 +43,8 @@ obj-$(CONFIG_OF_RTC) += of_rtc.o
obj-$(CONFIG_CPM) += cpm_common.o
obj-$(CONFIG_CPM1) += cpm1.o
obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o
obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o cpm_gpio.o
obj-$(CONFIG_8xx_GPIO) += cpm_gpio.o
obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
obj-$(CONFIG_PPC_DCR) += dcr.o
obj-$(CONFIG_UCODE_PATCH) += micropatch.o

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@ -629,8 +629,9 @@ static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)
return 0;
}
int cpm1_gpiochip_add16(struct device_node *np)
int cpm1_gpiochip_add16(struct device *dev)
{
struct device_node *np = dev->of_node;
struct cpm1_gpio16_chip *cpm1_gc;
struct of_mm_gpio_chip *mm_gc;
struct gpio_chip *gc;
@ -660,6 +661,8 @@ int cpm1_gpiochip_add16(struct device_node *np)
gc->get = cpm1_gpio16_get;
gc->set = cpm1_gpio16_set;
gc->to_irq = cpm1_gpio16_to_irq;
gc->parent = dev;
gc->owner = THIS_MODULE;
return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);
}
@ -755,8 +758,9 @@ static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
return 0;
}
int cpm1_gpiochip_add32(struct device_node *np)
int cpm1_gpiochip_add32(struct device *dev)
{
struct device_node *np = dev->of_node;
struct cpm1_gpio32_chip *cpm1_gc;
struct of_mm_gpio_chip *mm_gc;
struct gpio_chip *gc;
@ -776,31 +780,10 @@ int cpm1_gpiochip_add32(struct device_node *np)
gc->direction_output = cpm1_gpio32_dir_out;
gc->get = cpm1_gpio32_get;
gc->set = cpm1_gpio32_set;
gc->parent = dev;
gc->owner = THIS_MODULE;
return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);
}
static int cpm_init_par_io(void)
{
struct device_node *np;
for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-a")
cpm1_gpiochip_add16(np);
for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-b")
cpm1_gpiochip_add32(np);
for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-c")
cpm1_gpiochip_add16(np);
for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-d")
cpm1_gpiochip_add16(np);
/* Port E uses CPM2 layout */
for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-e")
cpm2_gpiochip_add32(np);
return 0;
}
arch_initcall(cpm_init_par_io);
#endif /* CONFIG_8xx_GPIO */

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@ -354,14 +354,3 @@ void cpm2_set_pin(int port, int pin, int flags)
else
clrbits32(&iop[port].odr, pin);
}
static int cpm_init_par_io(void)
{
struct device_node *np;
for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
cpm2_gpiochip_add32(np);
return 0;
}
arch_initcall(cpm_init_par_io);

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@ -190,8 +190,9 @@ static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
return 0;
}
int cpm2_gpiochip_add32(struct device_node *np)
int cpm2_gpiochip_add32(struct device *dev)
{
struct device_node *np = dev->of_node;
struct cpm2_gpio32_chip *cpm2_gc;
struct of_mm_gpio_chip *mm_gc;
struct gpio_chip *gc;
@ -211,6 +212,8 @@ int cpm2_gpiochip_add32(struct device_node *np)
gc->direction_output = cpm2_gpio32_dir_out;
gc->get = cpm2_gpio32_get;
gc->set = cpm2_gpio32_set;
gc->parent = dev;
gc->owner = THIS_MODULE;
return of_mm_gpiochip_add_data(np, mm_gc, cpm2_gc);
}

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@ -0,0 +1,80 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Common CPM GPIO wrapper for the CPM GPIO ports
*
* Author: Christophe Leroy <christophe.leroy@c-s.fr>
*
* Copyright 2017 CS Systemes d'Information.
*
*/
#include <linux/module.h>
#include <linux/of_device.h>
#include <asm/cpm.h>
#ifdef CONFIG_8xx_GPIO
#include <asm/cpm1.h>
#endif
static int cpm_gpio_probe(struct platform_device *ofdev)
{
struct device *dev = &ofdev->dev;
int (*gp_add)(struct device *dev) = of_device_get_match_data(dev);
if (!gp_add)
return -ENODEV;
return gp_add(dev);
}
static const struct of_device_id cpm_gpio_match[] = {
#ifdef CONFIG_8xx_GPIO
{
.compatible = "fsl,cpm1-pario-bank-a",
.data = cpm1_gpiochip_add16,
},
{
.compatible = "fsl,cpm1-pario-bank-b",
.data = cpm1_gpiochip_add32,
},
{
.compatible = "fsl,cpm1-pario-bank-c",
.data = cpm1_gpiochip_add16,
},
{
.compatible = "fsl,cpm1-pario-bank-d",
.data = cpm1_gpiochip_add16,
},
/* Port E uses CPM2 layout */
{
.compatible = "fsl,cpm1-pario-bank-e",
.data = cpm2_gpiochip_add32,
},
#endif
{
.compatible = "fsl,cpm2-pario-bank",
.data = cpm2_gpiochip_add32,
},
{},
};
MODULE_DEVICE_TABLE(of, cpm_gpio_match);
static struct platform_driver cpm_gpio_driver = {
.probe = cpm_gpio_probe,
.driver = {
.name = "cpm-gpio",
.owner = THIS_MODULE,
.of_match_table = cpm_gpio_match,
},
};
static int __init cpm_gpio_init(void)
{
return platform_driver_register(&cpm_gpio_driver);
}
arch_initcall(cpm_gpio_init);
MODULE_AUTHOR("Christophe Leroy <christophe.leroy@c-s.fr>");
MODULE_DESCRIPTION("Driver for CPM GPIO");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:cpm-gpio");

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@ -1070,7 +1070,7 @@ int fsl_pci_mcheck_exception(struct pt_regs *regs)
if (is_in_pci_mem_space(addr)) {
if (user_mode(regs)) {
pagefault_disable();
ret = get_user(regs->nip, &inst);
ret = get_user(inst, (__u32 __user *)regs->nip);
pagefault_enable();
} else {
ret = probe_kernel_address((void *)regs->nip, inst);
@ -1304,10 +1304,8 @@ static int add_err_dev(struct platform_device *pdev)
pdev->resource,
pdev->num_resources,
&pd, sizeof(pd));
if (IS_ERR(errdev))
return PTR_ERR(errdev);
return 0;
return PTR_ERR_OR_ZERO(errdev);
}
static int fsl_pci_probe(struct platform_device *pdev)