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ARM: Fix wrong register in proc-arm6_7.S data abort handler

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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2010-02-03 15:48:03 +00:00
parent 0b7d5170dc
commit 4aba098c8d
1 changed files with 1 additions and 1 deletions
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arch/arm/mm/proc-arm6_7.S
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@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area)
ENTRY(cpu_arm7_data_abort) ENTRY(cpu_arm7_data_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR mrc p15, 0, r0, c6, c0, 0 @ get FAR
ldr r8, [r0] @ read arm instruction ldr r8, [r2] @ read arm instruction
tst r8, #1 << 20 @ L = 0 -> write? tst r8, #1 << 20 @ L = 0 -> write?
orreq r1, r1, #1 << 11 @ yes. orreq r1, r1, #1 << 11 @ yes.
and r7, r8, #15 << 24 and r7, r8, #15 << 24