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kasan: arm64: set TCR_EL1.TBID1 when enabled

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On hardware supporting pointer authentication, we previously ended up
enabling TBI on instruction accesses when tag-based ASAN was enabled,
but this was costing us 8 bits of PAC entropy, which was unnecessary
since tag-based ASAN does not require TBI on instruction accesses. Get
them back by setting TCR_EL1.TBID1.

Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Andrey Konovalov <andreyknvl@google.com>
Link: https://linux-review.googlesource.com/id/I3dded7824be2e70ea64df0aabab9598d5aebfcc4
Link: https://lore.kernel.org/r/20f64e26fc8a1309caa446fffcb1b4e2fe9e229f.1605952129.git.pcc@google.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Peter Collingbourne 2020-11-21 01:59:02 -08:00 committed by Catalin Marinas
parent 739003c642
commit 49b3cf035e
2 changed files with 2 additions and 1 deletions
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1
arch/arm64/include/asm/pgtable-hwdef.h
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@ -260,6 +260,7 @@
#define TCR_TBI1 (UL(1) << 38) #define TCR_TBI1 (UL(1) << 38)
#define TCR_HA (UL(1) << 39) #define TCR_HA (UL(1) << 39)
#define TCR_HD (UL(1) << 40) #define TCR_HD (UL(1) << 40)
#define TCR_TBID1 (UL(1) << 52)
#define TCR_NFD0 (UL(1) << 53) #define TCR_NFD0 (UL(1) << 53)
#define TCR_NFD1 (UL(1) << 54) #define TCR_NFD1 (UL(1) << 54)
#define TCR_E0PD0 (UL(1) << 55) #define TCR_E0PD0 (UL(1) << 55)

2
arch/arm64/mm/proc.S
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@ -40,7 +40,7 @@
#define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA
#ifdef CONFIG_KASAN_SW_TAGS #ifdef CONFIG_KASAN_SW_TAGS
#define TCR_KASAN_FLAGS TCR_TBI1 #define TCR_KASAN_FLAGS TCR_TBI1 | TCR_TBID1
#else #else
#define TCR_KASAN_FLAGS 0 #define TCR_KASAN_FLAGS 0
#endif #endif