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irqchip/gic-v3-its: Provide MSI parent infrastructure
To support per device MSI domains the ITS must provide MSI parent domain functionality. Provide the basic skeleton for this: - msi_parent_ops - child domain init callback - the MSI parent flag set in irqdomain::flags This does not make ITS a functional parent domain as there is no bit set in the bus_select_mask yet, but it provides the base to implement PCI and platform MSI support gradually on top. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Anna-Maria Behnsen <anna-maria@linutronix.de> Signed-off-by: Shivamurthy Shastri <shivamurthy.shastri@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240623142234.903076277@linutronix.de
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@ -41,6 +41,7 @@ config ARM_GIC_V3
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config ARM_GIC_V3_ITS
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bool
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select GENERIC_MSI_IRQ
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select IRQ_MSI_LIB
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default ARM_GIC_V3
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config ARM_GIC_V3_ITS_PCI
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@ -32,7 +32,7 @@ obj-$(CONFIG_ARCH_REALVIEW) += irq-gic-realview.o
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obj-$(CONFIG_IRQ_MSI_LIB) += irq-msi-lib.o
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obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
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obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-v3-mbi.o irq-gic-common.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o irq-gic-v3-its-msi-parent.o
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obj-$(CONFIG_ARM_GIC_V3_ITS_PCI) += irq-gic-v3-its-pci-msi.o
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obj-$(CONFIG_ARM_GIC_V3_ITS_FSL_MC) += irq-gic-v3-its-fsl-mc-msi.o
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obj-$(CONFIG_PARTITION_PERCPU) += irq-partition-percpu.o
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@ -8,6 +8,7 @@
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#include <linux/of.h>
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#include <linux/irqdomain.h>
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#include <linux/msi.h>
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#include <linux/irqchip/arm-gic-common.h>
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struct gic_quirk {
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@ -29,6 +30,8 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
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void gic_enable_of_quirks(const struct device_node *np,
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const struct gic_quirk *quirks, void *data);
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extern const struct msi_parent_ops gic_v3_its_msi_parent_ops;
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#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
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#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
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#define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2)
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31
drivers/irqchip/irq-gic-v3-its-msi-parent.c
Normal file
31
drivers/irqchip/irq-gic-v3-its-msi-parent.c
Normal file
@ -0,0 +1,31 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// Copyright (C) 2022 Linutronix GmbH
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// Copyright (C) 2022 Intel
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#include "irq-gic-common.h"
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#include "irq-msi-lib.h"
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#define ITS_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
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MSI_FLAG_USE_DEF_CHIP_OPS)
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#define ITS_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
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MSI_FLAG_PCI_MSIX | \
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MSI_FLAG_MULTI_PCI_MSI | \
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MSI_FLAG_PCI_MSI_MASK_PARENT)
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static bool its_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
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struct irq_domain *real_parent, struct msi_domain_info *info)
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{
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if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info))
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return false;
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return true;
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}
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const struct msi_parent_ops gic_v3_its_msi_parent_ops = {
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.supported_flags = ITS_MSI_FLAGS_SUPPORTED,
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.required_flags = ITS_MSI_FLAGS_REQUIRED,
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.bus_select_token = DOMAIN_BUS_NEXUS,
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.prefix = "ITS-",
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.init_dev_msi_info = its_init_dev_msi_info,
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};
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@ -38,6 +38,7 @@
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#include <asm/exception.h>
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#include "irq-gic-common.h"
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#include "irq-msi-lib.h"
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#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0)
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#define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1)
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@ -3688,6 +3689,7 @@ static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
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}
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static const struct irq_domain_ops its_domain_ops = {
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.select = msi_lib_irq_domain_select,
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.alloc = its_irq_domain_alloc,
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.free = its_irq_domain_free,
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.activate = its_irq_domain_activate,
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@ -4993,6 +4995,9 @@ static int its_init_domain(struct its_node *its)
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irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS);
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inner_domain->msi_parent_ops = &gic_v3_its_msi_parent_ops;
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inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
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return 0;
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}
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