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x86/speculation, KVM: Implement support for VIRT_SPEC_CTRL/LS_CFG
Add the necessary logic for supporting the emulated VIRT_SPEC_CTRL MSR to x86_virt_spec_ctrl(). If either X86_FEATURE_LS_CFG_SSBD or X86_FEATURE_VIRT_SPEC_CTRL is set then use the new guest_virt_spec_ctrl argument to check whether the state must be modified on the host. The update reuses speculative_store_bypass_update() so the ZEN-specific sibling coordination can be reused. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -53,6 +53,12 @@ static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
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return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
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}
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static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl)
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{
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BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
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return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
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}
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static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
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{
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return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
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@ -162,6 +162,36 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
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wrmsrl(MSR_IA32_SPEC_CTRL, msrval);
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}
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}
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/*
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* If SSBD is not handled in MSR_SPEC_CTRL on AMD, update
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* MSR_AMD64_L2_CFG or MSR_VIRT_SPEC_CTRL if supported.
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*/
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if (!static_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
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!static_cpu_has(X86_FEATURE_VIRT_SSBD))
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return;
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/*
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* If the host has SSBD mitigation enabled, force it in the host's
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* virtual MSR value. If its not permanently enabled, evaluate
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* current's TIF_SSBD thread flag.
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*/
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if (static_cpu_has(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE))
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hostval = SPEC_CTRL_SSBD;
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else
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hostval = ssbd_tif_to_spec_ctrl(ti->flags);
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/* Sanitize the guest value */
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guestval = guest_virt_spec_ctrl & SPEC_CTRL_SSBD;
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if (hostval != guestval) {
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unsigned long tif;
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tif = setguest ? ssbd_spec_ctrl_to_tif(guestval) :
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ssbd_spec_ctrl_to_tif(hostval);
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speculative_store_bypass_update(tif);
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}
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}
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EXPORT_SYMBOL_GPL(x86_virt_spec_ctrl);
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