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RDMA/hns: Optimize 0 hop addressing for EQE buffer
Use the new mtr interface to simple the hop 0 addressing and multihop addressing process. Link: https://lore.kernel.org/r/1586779091-51410-4-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Xi Wang
Jason Gunthorpe
parent
cc23267aed
commit
477a0a3870
@ -794,17 +794,11 @@ struct hns_roce_eq {
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int over_ignore;
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int coalesce;
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int arm_st;
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u64 eqe_ba;
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int eqe_ba_pg_sz;
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int eqe_buf_pg_sz;
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int hop_num;
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struct hns_roce_mtr mtr;
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struct hns_roce_buf buf;
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int eq_max_cnt;
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int eq_period;
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int shift;
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dma_addr_t cur_eqe_ba;
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dma_addr_t nxt_eqe_ba;
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int event_type;
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int sub_type;
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};
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@ -4993,7 +4993,7 @@ static struct hns_roce_aeqe *next_aeqe_sw_v2(struct hns_roce_eq *eq)
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{
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struct hns_roce_aeqe *aeqe;
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aeqe = hns_roce_buf_offset(&eq->buf,
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aeqe = hns_roce_buf_offset(eq->mtr.kmem,
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(eq->cons_index & (eq->entries - 1)) *
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HNS_ROCE_AEQ_ENTRY_SIZE);
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@ -5093,7 +5093,7 @@ static struct hns_roce_ceqe *next_ceqe_sw_v2(struct hns_roce_eq *eq)
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{
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struct hns_roce_ceqe *ceqe;
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ceqe = hns_roce_buf_offset(&eq->buf,
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ceqe = hns_roce_buf_offset(eq->mtr.kmem,
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(eq->cons_index & (eq->entries - 1)) *
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HNS_ROCE_CEQ_ENTRY_SIZE);
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return (!!(roce_get_bit(ceqe->comp, HNS_ROCE_V2_CEQ_CEQE_OWNER_S))) ^
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@ -5254,17 +5254,15 @@ static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, int eqn)
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static void free_eq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq)
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{
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if (!eq->hop_num || eq->hop_num == HNS_ROCE_HOP_NUM_0)
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hns_roce_mtr_cleanup(hr_dev, &eq->mtr);
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hns_roce_buf_free(hr_dev, &eq->buf);
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hns_roce_mtr_destroy(hr_dev, &eq->mtr);
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}
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static void hns_roce_config_eqc(struct hns_roce_dev *hr_dev,
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struct hns_roce_eq *eq,
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void *mb_buf)
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static int config_eqc(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq,
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void *mb_buf)
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{
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u64 eqe_ba[MTT_MIN_COUNT] = { 0 };
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struct hns_roce_eq_context *eqc;
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u64 ba[MTT_MIN_COUNT] = { 0 };
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u64 bt_ba = 0;
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int count;
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eqc = mb_buf;
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@ -5272,32 +5270,18 @@ static void hns_roce_config_eqc(struct hns_roce_dev *hr_dev,
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/* init eqc */
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eq->doorbell = hr_dev->reg_base + ROCEE_VF_EQ_DB_CFG0_REG;
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eq->hop_num = hr_dev->caps.eqe_hop_num;
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eq->cons_index = 0;
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eq->over_ignore = HNS_ROCE_V2_EQ_OVER_IGNORE_0;
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eq->coalesce = HNS_ROCE_V2_EQ_COALESCE_0;
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eq->arm_st = HNS_ROCE_V2_EQ_ALWAYS_ARMED;
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eq->eqe_ba_pg_sz = hr_dev->caps.eqe_ba_pg_sz;
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eq->eqe_buf_pg_sz = hr_dev->caps.eqe_buf_pg_sz;
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eq->shift = ilog2((unsigned int)eq->entries);
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/* if not multi-hop, eqe buffer only use one trunk */
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eq->eqe_buf_pg_sz = eq->buf.page_shift - PAGE_ADDR_SHIFT;
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if (!eq->hop_num || eq->hop_num == HNS_ROCE_HOP_NUM_0) {
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eq->eqe_ba = eq->buf.direct.map;
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eq->cur_eqe_ba = eq->eqe_ba;
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if (eq->buf.npages > 1)
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eq->nxt_eqe_ba = eq->eqe_ba + (1 << eq->eqe_buf_pg_sz);
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else
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eq->nxt_eqe_ba = eq->eqe_ba;
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} else {
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count = hns_roce_mtr_find(hr_dev, &eq->mtr, 0, ba,
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MTT_MIN_COUNT, &eq->eqe_ba);
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eq->cur_eqe_ba = ba[0];
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if (count > 1)
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eq->nxt_eqe_ba = ba[1];
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else
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eq->nxt_eqe_ba = ba[0];
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count = hns_roce_mtr_find(hr_dev, &eq->mtr, 0, eqe_ba, MTT_MIN_COUNT,
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&bt_ba);
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if (count < 1) {
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dev_err(hr_dev->dev, "failed to find EQE mtr\n");
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return -ENOBUFS;
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}
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/* set eqc state */
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@ -5331,12 +5315,12 @@ static void hns_roce_config_eqc(struct hns_roce_dev *hr_dev,
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/* set eqe_ba_pg_sz */
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roce_set_field(eqc->byte_8, HNS_ROCE_EQC_BA_PG_SZ_M,
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HNS_ROCE_EQC_BA_PG_SZ_S,
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eq->eqe_ba_pg_sz + PG_SHIFT_OFFSET);
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to_hr_hw_page_shift(eq->mtr.hem_cfg.ba_pg_shift));
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/* set eqe_buf_pg_sz */
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roce_set_field(eqc->byte_8, HNS_ROCE_EQC_BUF_PG_SZ_M,
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HNS_ROCE_EQC_BUF_PG_SZ_S,
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eq->eqe_buf_pg_sz + PG_SHIFT_OFFSET);
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to_hr_hw_page_shift(eq->mtr.hem_cfg.buf_pg_shift));
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/* set eq_producer_idx */
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roce_set_field(eqc->byte_8, HNS_ROCE_EQC_PROD_INDX_M,
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@ -5355,13 +5339,13 @@ static void hns_roce_config_eqc(struct hns_roce_dev *hr_dev,
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HNS_ROCE_EQC_REPORT_TIMER_S,
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HNS_ROCE_EQ_INIT_REPORT_TIMER);
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/* set eqe_ba [34:3] */
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/* set bt_ba [34:3] */
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roce_set_field(eqc->eqe_ba0, HNS_ROCE_EQC_EQE_BA_L_M,
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HNS_ROCE_EQC_EQE_BA_L_S, eq->eqe_ba >> 3);
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HNS_ROCE_EQC_EQE_BA_L_S, bt_ba >> 3);
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/* set eqe_ba [64:35] */
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/* set bt_ba [64:35] */
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roce_set_field(eqc->eqe_ba1, HNS_ROCE_EQC_EQE_BA_H_M,
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HNS_ROCE_EQC_EQE_BA_H_S, eq->eqe_ba >> 35);
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HNS_ROCE_EQC_EQE_BA_H_S, bt_ba >> 35);
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/* set eq shift */
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roce_set_field(eqc->byte_28, HNS_ROCE_EQC_SHIFT_M, HNS_ROCE_EQC_SHIFT_S,
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@ -5373,15 +5357,15 @@ static void hns_roce_config_eqc(struct hns_roce_dev *hr_dev,
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/* set cur_eqe_ba [27:12] */
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roce_set_field(eqc->byte_28, HNS_ROCE_EQC_CUR_EQE_BA_L_M,
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HNS_ROCE_EQC_CUR_EQE_BA_L_S, eq->cur_eqe_ba >> 12);
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HNS_ROCE_EQC_CUR_EQE_BA_L_S, eqe_ba[0] >> 12);
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/* set cur_eqe_ba [59:28] */
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roce_set_field(eqc->byte_32, HNS_ROCE_EQC_CUR_EQE_BA_M_M,
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HNS_ROCE_EQC_CUR_EQE_BA_M_S, eq->cur_eqe_ba >> 28);
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HNS_ROCE_EQC_CUR_EQE_BA_M_S, eqe_ba[0] >> 28);
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/* set cur_eqe_ba [63:60] */
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roce_set_field(eqc->byte_36, HNS_ROCE_EQC_CUR_EQE_BA_H_M,
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HNS_ROCE_EQC_CUR_EQE_BA_H_S, eq->cur_eqe_ba >> 60);
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HNS_ROCE_EQC_CUR_EQE_BA_H_S, eqe_ba[0] >> 60);
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/* set eq consumer idx */
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roce_set_field(eqc->byte_36, HNS_ROCE_EQC_CONS_INDX_M,
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@ -5389,98 +5373,38 @@ static void hns_roce_config_eqc(struct hns_roce_dev *hr_dev,
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/* set nex_eqe_ba[43:12] */
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roce_set_field(eqc->nxt_eqe_ba0, HNS_ROCE_EQC_NXT_EQE_BA_L_M,
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HNS_ROCE_EQC_NXT_EQE_BA_L_S, eq->nxt_eqe_ba >> 12);
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HNS_ROCE_EQC_NXT_EQE_BA_L_S, eqe_ba[1] >> 12);
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/* set nex_eqe_ba[63:44] */
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roce_set_field(eqc->nxt_eqe_ba1, HNS_ROCE_EQC_NXT_EQE_BA_H_M,
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HNS_ROCE_EQC_NXT_EQE_BA_H_S, eq->nxt_eqe_ba >> 44);
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}
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HNS_ROCE_EQC_NXT_EQE_BA_H_S, eqe_ba[1] >> 44);
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static int map_eq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq,
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u32 page_shift)
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{
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struct hns_roce_buf_region region = {};
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dma_addr_t *buf_list = NULL;
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int ba_num;
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int ret;
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ba_num = DIV_ROUND_UP(PAGE_ALIGN(eq->entries * eq->eqe_size),
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1 << page_shift);
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hns_roce_init_buf_region(®ion, hr_dev->caps.eqe_hop_num, 0, ba_num);
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/* alloc a tmp list for storing eq buf address */
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ret = hns_roce_alloc_buf_list(®ion, &buf_list, 1);
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if (ret) {
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dev_err(hr_dev->dev, "alloc eq buf_list error\n");
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return ret;
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}
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ba_num = hns_roce_get_kmem_bufs(hr_dev, buf_list, region.count,
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region.offset, &eq->buf);
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if (ba_num != region.count) {
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dev_err(hr_dev->dev, "get eqe buf err,expect %d,ret %d.\n",
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region.count, ba_num);
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ret = -ENOBUFS;
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goto done;
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}
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hns_roce_mtr_init(&eq->mtr, PAGE_ADDR_SHIFT + hr_dev->caps.eqe_ba_pg_sz,
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page_shift);
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ret = hns_roce_mtr_attach(hr_dev, &eq->mtr, &buf_list, ®ion, 1);
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if (ret)
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dev_err(hr_dev->dev, "mtr attach error for eqe\n");
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goto done;
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hns_roce_mtr_cleanup(hr_dev, &eq->mtr);
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done:
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hns_roce_free_buf_list(&buf_list, 1);
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return ret;
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return 0;
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}
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static int alloc_eq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq)
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{
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struct hns_roce_buf *buf = &eq->buf;
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bool is_mhop = false;
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u32 page_shift;
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u32 mhop_num;
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u32 max_size;
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u32 buf_size;
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int ret;
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struct hns_roce_buf_attr buf_attr = {};
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int err;
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page_shift = PAGE_ADDR_SHIFT + hr_dev->caps.eqe_buf_pg_sz;
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mhop_num = hr_dev->caps.eqe_hop_num;
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if (!mhop_num) {
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max_size = 1 << page_shift;
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buf_size = max_size;
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} else if (mhop_num == HNS_ROCE_HOP_NUM_0) {
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max_size = eq->entries * eq->eqe_size;
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buf_size = max_size;
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} else {
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max_size = 1 << page_shift;
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buf_size = round_up(eq->entries * eq->eqe_size, max_size);
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is_mhop = true;
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}
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if (hr_dev->caps.eqe_hop_num == HNS_ROCE_HOP_NUM_0)
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eq->hop_num = 0;
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else
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eq->hop_num = hr_dev->caps.eqe_hop_num;
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ret = hns_roce_buf_alloc(hr_dev, buf_size, max_size, buf, page_shift);
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if (ret) {
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dev_err(hr_dev->dev, "alloc eq buf error\n");
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return ret;
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}
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buf_attr.page_shift = hr_dev->caps.eqe_buf_pg_sz + PAGE_ADDR_SHIFT;
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buf_attr.region[0].size = eq->entries * eq->eqe_size;
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buf_attr.region[0].hopnum = eq->hop_num;
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buf_attr.region_count = 1;
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buf_attr.fixed_page = true;
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if (is_mhop) {
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ret = map_eq_buf(hr_dev, eq, page_shift);
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if (ret) {
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dev_err(hr_dev->dev, "map roce buf error\n");
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goto err_alloc;
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}
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}
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err = hns_roce_mtr_create(hr_dev, &eq->mtr, &buf_attr,
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hr_dev->caps.srqwqe_ba_pg_sz +
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PAGE_ADDR_SHIFT, NULL, 0);
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if (err)
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dev_err(hr_dev->dev, "Failed to alloc EQE mtr, err %d\n", err);
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return 0;
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err_alloc:
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hns_roce_buf_free(hr_dev, buf);
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return ret;
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return err;
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}
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static int hns_roce_v2_create_eq(struct hns_roce_dev *hr_dev,
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@ -5492,15 +5416,16 @@ static int hns_roce_v2_create_eq(struct hns_roce_dev *hr_dev,
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/* Allocate mailbox memory */
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mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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if (IS_ERR_OR_NULL(mailbox))
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return -ENOMEM;
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ret = alloc_eq_buf(hr_dev, eq);
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if (ret) {
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ret = -ENOMEM;
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if (ret)
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goto free_cmd_mbox;
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}
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hns_roce_config_eqc(hr_dev, eq, mailbox->buf);
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ret = config_eqc(hr_dev, eq, mailbox->buf);
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if (ret)
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goto err_cmd_mbox;
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ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, eq->eqn, 0,
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eq_cmd, HNS_ROCE_CMD_TIMEOUT_MSECS);
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