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perf: imx_perf: add macro definitions for parsing config attr

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The user can set event and counter in cmdline and the driver need to parse
it using 'config' attr value. This will add macro definitions to avoid
hard-code in driver.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Link: https://lore.kernel.org/r/20240529080358.703784-2-xu.yang_2@nxp.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Xu Yang 2024-05-29 16:03:52 +08:00 committed by Will Deacon
parent f26f374824
commit 4773dd10fd
1 changed files with 9 additions and 4 deletions
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13
drivers/perf/fsl_imx9_ddr_perf.c
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@ -42,6 +42,9 @@
#define NUM_COUNTERS 11 #define NUM_COUNTERS 11
#define CYCLES_COUNTER 0 #define CYCLES_COUNTER 0
#define CONFIG_EVENT_MASK GENMASK(7, 0)
#define CONFIG_COUNTER_MASK GENMASK(15, 8)
#define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu) #define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
#define DDR_PERF_DEV_NAME "imx9_ddr" #define DDR_PERF_DEV_NAME "imx9_ddr"
@ -339,8 +342,10 @@ static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config,
int counter, bool enable) int counter, bool enable)
{ {
u32 ctrl_a; u32 ctrl_a;
int event;
ctrl_a = readl_relaxed(pmu->base + PMLCA(counter)); ctrl_a = readl_relaxed(pmu->base + PMLCA(counter));
event = FIELD_GET(CONFIG_EVENT_MASK, config);
if (enable) { if (enable) {
ctrl_a |= PMLCA_FC; ctrl_a |= PMLCA_FC;
@ -352,7 +357,7 @@ static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config,
ctrl_a &= ~PMLCA_FC; ctrl_a &= ~PMLCA_FC;
ctrl_a |= PMLCA_CE; ctrl_a |= PMLCA_CE;
ctrl_a &= ~FIELD_PREP(PMLCA_EVENT, 0x7F); ctrl_a &= ~FIELD_PREP(PMLCA_EVENT, 0x7F);
ctrl_a |= FIELD_PREP(PMLCA_EVENT, (config & 0x000000FF)); ctrl_a |= FIELD_PREP(PMLCA_EVENT, event);
writel(ctrl_a, pmu->base + PMLCA(counter)); writel(ctrl_a, pmu->base + PMLCA(counter));
} else { } else {
/* Freeze counter. */ /* Freeze counter. */
@ -366,8 +371,8 @@ static void ddr_perf_monitor_config(struct ddr_pmu *pmu, int cfg, int cfg1, int
u32 pmcfg1, pmcfg2; u32 pmcfg1, pmcfg2;
int event, counter; int event, counter;
event = cfg & 0x000000FF; event = FIELD_GET(CONFIG_EVENT_MASK, cfg);
counter = (cfg & 0x0000FF00) >> 8; counter = FIELD_GET(CONFIG_COUNTER_MASK, cfg);
pmcfg1 = readl_relaxed(pmu->base + PMCFG1); pmcfg1 = readl_relaxed(pmu->base + PMCFG1);
@ -469,7 +474,7 @@ static int ddr_perf_event_add(struct perf_event *event, int flags)
int cfg2 = event->attr.config2; int cfg2 = event->attr.config2;
int counter; int counter;
counter = (cfg & 0x0000FF00) >> 8; counter = FIELD_GET(CONFIG_COUNTER_MASK, cfg);
pmu->events[counter] = event; pmu->events[counter] = event;
pmu->active_events++; pmu->active_events++;