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powerpc/32s: Add _PAGE_WRITE to supplement _PAGE_RW
Several places, _PAGE_RW maps to write permission and don't
always imply read. To make it more clear, do as book3s/64 in
commit c7d54842de
("powerpc/mm: Use _PAGE_READ to indicate
Read access") and use _PAGE_WRITE when more relevant.
For the time being _PAGE_WRITE is equivalent to _PAGE_RW but that
will change when _PAGE_READ gets added in following patches.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/5798782869fe4d2698f104948dabd17657b89395.1695659959.git.christophe.leroy@csgroup.eu
This commit is contained in:
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@ -31,6 +31,8 @@
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#define _PAGE_RW 0x400 /* software: user write access allowed */
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#define _PAGE_SPECIAL 0x800 /* software: Special page */
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#define _PAGE_WRITE _PAGE_RW
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#ifdef CONFIG_PTE_64BIT
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/* We never clear the high word of the pte */
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#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
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@ -347,7 +349,7 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
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pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
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}
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static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
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@ -406,7 +408,11 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
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}
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/* Generic accessors to PTE bits */
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static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_RW);}
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static inline bool pte_write(pte_t pte)
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{
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return !!(pte_val(pte) & _PAGE_WRITE);
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}
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static inline int pte_read(pte_t pte) { return 1; }
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static inline int pte_dirty(pte_t pte) { return !!(pte_val(pte) & _PAGE_DIRTY); }
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static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); }
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@ -469,7 +475,7 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
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/* Generic modifiers for PTE bits */
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_RW);
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return __pte(pte_val(pte) & ~_PAGE_WRITE);
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}
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static inline pte_t pte_exprotect(pte_t pte)
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@ -499,6 +505,9 @@ static inline pte_t pte_mkpte(pte_t pte)
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static inline pte_t pte_mkwrite_novma(pte_t pte)
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{
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/*
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* write implies read, hence set both
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*/
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return __pte(pte_val(pte) | _PAGE_RW);
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}
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@ -503,9 +503,9 @@ DataLoadTLBMiss:
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andc. r1,r1,r0 /* check access & ~permission */
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bne- DataAddressInvalid /* return if access not permitted */
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/* Convert linux-style PTE to low word of PPC-style PTE */
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rlwinm r1,r0,32-9,30,30 /* _PAGE_RW -> PP msb */
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rlwinm r1,r0,32-9,30,30 /* _PAGE_WRITE -> PP msb */
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rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */
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rlwimi r1,r0,32-3,24,24 /* _PAGE_RW -> _PAGE_DIRTY */
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rlwimi r1,r0,32-3,24,24 /* _PAGE_WRITE -> _PAGE_DIRTY */
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rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */
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xori r1,r1,_PAGE_DIRTY /* clear dirty when not rw */
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ori r1,r1,0xe04 /* clear out reserved bits */
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@ -689,7 +689,7 @@ hash_page_dsi:
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mfdar r4
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mfsrr0 r5
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mfsrr1 r9
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rlwinm r3, r3, 32 - 15, _PAGE_RW /* DSISR_STORE -> _PAGE_RW */
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rlwinm r3, r3, 32 - 15, _PAGE_WRITE /* DSISR_STORE -> _PAGE_WRITE */
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bl hash_page
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mfspr r10, SPRN_SPRG_THREAD
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restore_regs_thread r10
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@ -37,7 +37,7 @@
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/*
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* Load a PTE into the hash table, if possible.
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* The address is in r4, and r3 contains an access flag:
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* _PAGE_RW (0x400) if a write.
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* _PAGE_WRITE (0x400) if a write.
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* r9 contains the SRR1 value, from which we use the MSR_PR bit.
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* SPRG_THREAD contains the physical address of the current task's thread.
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*
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@ -113,15 +113,15 @@ _GLOBAL(hash_page)
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lwarx r6,0,r8 /* get linux-style pte, flag word */
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#ifdef CONFIG_PPC_KUAP
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mfsrin r5,r4
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rlwinm r0,r9,28,_PAGE_RW /* MSR[PR] => _PAGE_RW */
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rlwinm r5,r5,12,_PAGE_RW /* Ks => _PAGE_RW */
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rlwinm r0,r9,28,_PAGE_WRITE /* MSR[PR] => _PAGE_WRITE */
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rlwinm r5,r5,12,_PAGE_WRITE /* Ks => _PAGE_WRITE */
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andc r5,r5,r0 /* Ks & ~MSR[PR] */
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andc r5,r6,r5 /* Clear _PAGE_RW when Ks = 1 && MSR[PR] = 0 */
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andc r5,r6,r5 /* Clear _PAGE_WRITE when Ks = 1 && MSR[PR] = 0 */
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andc. r5,r3,r5 /* check access & ~permission */
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#else
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andc. r5,r3,r6 /* check access & ~permission */
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#endif
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rlwinm r0,r3,32-3,24,24 /* _PAGE_RW access -> _PAGE_DIRTY */
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rlwinm r0,r3,32-3,24,24 /* _PAGE_WRITE access -> _PAGE_DIRTY */
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ori r0,r0,_PAGE_ACCESSED|_PAGE_HASHPTE
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#ifdef CONFIG_SMP
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bne- .Lhash_page_out /* return if access not permitted */
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@ -307,7 +307,7 @@ Hash_msk = (((1 << Hash_bits) - 1) * 64)
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__REF
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_GLOBAL(create_hpte)
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/* Convert linux-style PTE (r5) to low word of PPC-style PTE (r8) */
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rlwinm r8,r5,32-9,30,30 /* _PAGE_RW -> PP msb */
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rlwinm r8,r5,32-9,30,30 /* _PAGE_WRITE -> PP msb */
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rlwinm r0,r5,32-6,30,30 /* _PAGE_DIRTY -> PP msb */
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and r8,r8,r0 /* writable if _RW & _DIRTY */
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rlwimi r5,r5,32-1,30,30 /* _PAGE_USER -> PP msb */
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@ -277,7 +277,7 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
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/* Do DBAT first */
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wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
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| _PAGE_COHERENT | _PAGE_GUARDED);
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wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
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wimgxpp |= (flags & _PAGE_WRITE) ? BPP_RW : BPP_RX;
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bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
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bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp;
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if (!is_kernel_addr(virt))
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