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ARM: dts: i.MX6: Add regulator delay support
For ANATOP LDOs, vddcpu, vddsoc and vddpu have step time settings in the misc2 register, need to add necessary step time info for these three LDOs, then regulator driver can add necessary delay based on these settings. offset 0x170: bit [24-25]: vddcpu bit [26-27]: vddpu bit [28-29]: vddsoc field definition: 0'b00: 64 cycles of 24M clock; 0'b01: 128 cycles of 24M clock; 0'b02: 256 cycles of 24M clock; 0'b03: 512 cycles of 24M clock; Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -487,6 +487,9 @@
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anatop-reg-offset = <0x140>;
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anatop-vol-bit-shift = <0>;
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anatop-vol-bit-width = <5>;
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anatop-delay-reg-offset = <0x170>;
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anatop-delay-bit-shift = <24>;
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anatop-delay-bit-width = <2>;
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anatop-min-bit-val = <1>;
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anatop-min-voltage = <725000>;
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anatop-max-voltage = <1450000>;
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@ -501,6 +504,9 @@
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anatop-reg-offset = <0x140>;
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anatop-vol-bit-shift = <9>;
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anatop-vol-bit-width = <5>;
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anatop-delay-reg-offset = <0x170>;
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anatop-delay-bit-shift = <26>;
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anatop-delay-bit-width = <2>;
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anatop-min-bit-val = <1>;
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anatop-min-voltage = <725000>;
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anatop-max-voltage = <1450000>;
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@ -515,6 +521,9 @@
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anatop-reg-offset = <0x140>;
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anatop-vol-bit-shift = <18>;
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anatop-vol-bit-width = <5>;
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anatop-delay-reg-offset = <0x170>;
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anatop-delay-bit-shift = <28>;
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anatop-delay-bit-width = <2>;
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anatop-min-bit-val = <1>;
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anatop-min-voltage = <725000>;
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anatop-max-voltage = <1450000>;
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