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ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default
Enables MPUSS ES2 power management mode using ES2_PM_MODE in AMBA_IF_MODE register. 0x0: OMAP5 ES1 behavior, CPU cores would enter and exit OFF mode together. Broken! Fortunately, we do not support this anymore. 0x1: OMAP5 ES2, DRA7 behavior, CPU cores are allowed to enter/exit OFF mode independently. This is one time settings thanks to always ON domain. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [nm@ti.com: minor conflict resolutions, consolidation for DRA7] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
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@ -45,6 +45,7 @@
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#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
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#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
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#define OMAP5_MON_AMBA_IF_INDEX 0x108
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/* Secure PPA(Primary Protected Application) APIs */
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#define OMAP4_PPA_L2_POR_INDEX 0x23
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@ -406,6 +406,7 @@ int __init omap_wakeupgen_init(void)
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{
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int i;
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unsigned int boot_cpu = smp_processor_id();
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u32 val;
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/* Not supported on OMAP4 ES1.0 silicon */
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if (omap_rev() == OMAP4430_REV_ES1_0) {
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@ -451,6 +452,22 @@ int __init omap_wakeupgen_init(void)
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for (i = 0; i < max_irqs; i++)
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irq_target_cpu[i] = boot_cpu;
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/*
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* Enables OMAP5 ES2 PM Mode using ES2_PM_MODE in AMBA_IF_MODE
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* 0x0: ES1 behavior, CPU cores would enter and exit OFF mode together.
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* 0x1: ES2 behavior, CPU cores are allowed to enter/exit OFF mode
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* independently.
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* This needs to be set one time thanks to always ON domain.
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*
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* We do not support ES1 behavior anymore. OMAP5 is assumed to be
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* ES2.0, and the same is applicable for DRA7.
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*/
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if (soc_is_omap54xx() || soc_is_dra7xx()) {
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val = __raw_readl(wakeupgen_base + OMAP_AMBA_IF_MODE);
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val |= BIT(5);
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omap_smc1(OMAP5_MON_AMBA_IF_INDEX, val);
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}
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irq_hotplug_init();
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irq_pm_init();
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@ -27,6 +27,7 @@
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#define OMAP_WKG_ENB_E_1 0x420
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#define OMAP_AUX_CORE_BOOT_0 0x800
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#define OMAP_AUX_CORE_BOOT_1 0x804
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#define OMAP_AMBA_IF_MODE 0x80c
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#define OMAP_PTMSYNCREQ_MASK 0xc00
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#define OMAP_PTMSYNCREQ_EN 0xc04
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#define OMAP_TIMESTAMPCYCLELO 0xc08
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