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PCI: Align P2P windows using pcibios_window_alignment()
This patch changes pbus_size_io() and pbus_size_mem() to do window (I/O, memory and prefetchable memory) reassignment based on the minimal alignments for the P2P bridge, which was retrieved by window_alignment(). [bhelgaas: changelog] Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -749,17 +749,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
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struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
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unsigned long size = 0, size0 = 0, size1 = 0;
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resource_size_t children_add_size = 0;
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resource_size_t min_align = 4096, align;
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resource_size_t min_align, io_align, align;
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if (!b_res)
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return;
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/*
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* Per spec, I/O windows are 4K-aligned, but some bridges have an
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* extension to support 1K alignment.
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*/
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if (bus->self->io_window_1k)
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min_align = 1024;
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io_align = min_align = window_alignment(bus, IORESOURCE_IO);
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list_for_each_entry(dev, &bus->devices, bus_list) {
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int i;
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@ -786,8 +781,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
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}
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}
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if (min_align > 4096)
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min_align = 4096;
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if (min_align > io_align)
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min_align = io_align;
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size0 = calculate_iosize(size, min_size, size1,
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resource_size(b_res), min_align);
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@ -909,6 +904,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
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min_align = align1 >> 1;
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align += aligns[order];
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}
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min_align = max(min_align, window_alignment(bus, b_res->flags & mask));
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size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
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if (children_add_size > add_size)
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add_size = children_add_size;
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