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i.MX31: Add hw-random for RNGA
This hw-random driver add support to RNGA hardware found on some i.MX processors. Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com> Acked-by: Matt Mackall <mpm@selenic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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220bbcea27
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@ -1,6 +1,7 @@
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if ARCH_MX3
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config ARCH_MX31
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select ARCH_HAS_RNGA
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bool
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config ARCH_MX35
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@ -23,6 +23,7 @@
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/common.h>
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#include <mach/imx-uart.h>
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#include "devices.h"
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@ -283,6 +284,21 @@ struct platform_device mxcsdhc_device1 = {
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.num_resources = ARRAY_SIZE(mxcsdhc1_resources),
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.resource = mxcsdhc1_resources,
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};
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static struct resource rnga_resources[] = {
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{
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.start = RNGA_BASE_ADDR,
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.end = RNGA_BASE_ADDR + 0x28,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device mxc_rnga_device = {
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.name = "mxc_rnga",
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.id = -1,
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.num_resources = 1,
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.resource = rnga_resources,
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};
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#endif /* CONFIG_ARCH_MX31 */
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/* i.MX31 Image Processing Unit */
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@ -359,6 +375,7 @@ static int mx3_devices_init(void)
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if (cpu_is_mx31()) {
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mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
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mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
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mxc_register_device(&mxc_rnga_device, NULL);
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}
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if (cpu_is_mx35()) {
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mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
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@ -52,6 +52,10 @@ config MXC_PWM
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help
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Enable support for the i.MX PWM controller(s).
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config ARCH_HAS_RNGA
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bool
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depends on ARCH_MXC
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config ARCH_MXC_IOMUX_V3
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bool
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endif
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@ -148,3 +148,15 @@ config HW_RANDOM_VIRTIO
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To compile this driver as a module, choose M here: the
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module will be called virtio-rng. If unsure, say N.
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config HW_RANDOM_MXC_RNGA
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tristate "Freescale i.MX RNGA Random Number Generator"
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depends on HW_RANDOM && ARCH_HAS_RNGA
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---help---
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This driver provides kernel-side support for the Random Number
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Generator hardware found on Freescale i.MX processors.
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To compile this driver as a module, choose M here: the
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module will be called mxc-rnga.
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If unsure, say Y.
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@ -15,3 +15,4 @@ obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
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obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
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obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
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obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
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obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o
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247
drivers/char/hw_random/mxc-rnga.c
Normal file
247
drivers/char/hw_random/mxc-rnga.c
Normal file
@ -0,0 +1,247 @@
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/*
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* RNG driver for Freescale RNGA
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*
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* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*
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* This driver is based on other RNG drivers.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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/* RNGA Registers */
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#define RNGA_CONTROL 0x00
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#define RNGA_STATUS 0x04
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#define RNGA_ENTROPY 0x08
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#define RNGA_OUTPUT_FIFO 0x0c
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#define RNGA_MODE 0x10
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#define RNGA_VERIFICATION_CONTROL 0x14
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#define RNGA_OSC_CONTROL_COUNTER 0x18
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#define RNGA_OSC1_COUNTER 0x1c
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#define RNGA_OSC2_COUNTER 0x20
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#define RNGA_OSC_COUNTER_STATUS 0x24
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/* RNGA Registers Range */
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#define RNG_ADDR_RANGE 0x28
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/* RNGA Control Register */
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#define RNGA_CONTROL_SLEEP 0x00000010
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#define RNGA_CONTROL_CLEAR_INT 0x00000008
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#define RNGA_CONTROL_MASK_INTS 0x00000004
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#define RNGA_CONTROL_HIGH_ASSURANCE 0x00000002
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#define RNGA_CONTROL_GO 0x00000001
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#define RNGA_STATUS_LEVEL_MASK 0x0000ff00
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/* RNGA Status Register */
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#define RNGA_STATUS_OSC_DEAD 0x80000000
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#define RNGA_STATUS_SLEEP 0x00000010
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#define RNGA_STATUS_ERROR_INT 0x00000008
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#define RNGA_STATUS_FIFO_UNDERFLOW 0x00000004
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#define RNGA_STATUS_LAST_READ_STATUS 0x00000002
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#define RNGA_STATUS_SECURITY_VIOLATION 0x00000001
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static struct platform_device *rng_dev;
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static int mxc_rnga_data_present(struct hwrng *rng)
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{
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int level;
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void __iomem *rng_base = (void __iomem *)rng->priv;
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/* how many random numbers is in FIFO? [0-16] */
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level = ((__raw_readl(rng_base + RNGA_STATUS) &
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RNGA_STATUS_LEVEL_MASK) >> 8);
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return level > 0 ? 1 : 0;
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}
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static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
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{
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int err;
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u32 ctrl;
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void __iomem *rng_base = (void __iomem *)rng->priv;
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/* retrieve a random number from FIFO */
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*data = __raw_readl(rng_base + RNGA_OUTPUT_FIFO);
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/* some error while reading this random number? */
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err = __raw_readl(rng_base + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
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/* if error: clear error interrupt, but doesn't return random number */
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if (err) {
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dev_dbg(&rng_dev->dev, "Error while reading random number!\n");
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ctrl = __raw_readl(rng_base + RNGA_CONTROL);
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__raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT,
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rng_base + RNGA_CONTROL);
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return 0;
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} else
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return 4;
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}
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static int mxc_rnga_init(struct hwrng *rng)
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{
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u32 ctrl, osc;
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void __iomem *rng_base = (void __iomem *)rng->priv;
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/* wake up */
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ctrl = __raw_readl(rng_base + RNGA_CONTROL);
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__raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, rng_base + RNGA_CONTROL);
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/* verify if oscillator is working */
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osc = __raw_readl(rng_base + RNGA_STATUS);
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if (osc & RNGA_STATUS_OSC_DEAD) {
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dev_err(&rng_dev->dev, "RNGA Oscillator is dead!\n");
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return -ENODEV;
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}
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/* go running */
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ctrl = __raw_readl(rng_base + RNGA_CONTROL);
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__raw_writel(ctrl | RNGA_CONTROL_GO, rng_base + RNGA_CONTROL);
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return 0;
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}
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static void mxc_rnga_cleanup(struct hwrng *rng)
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{
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u32 ctrl;
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void __iomem *rng_base = (void __iomem *)rng->priv;
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ctrl = __raw_readl(rng_base + RNGA_CONTROL);
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/* stop rnga */
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__raw_writel(ctrl & ~RNGA_CONTROL_GO, rng_base + RNGA_CONTROL);
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}
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static struct hwrng mxc_rnga = {
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.name = "mxc-rnga",
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.init = mxc_rnga_init,
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.cleanup = mxc_rnga_cleanup,
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.data_present = mxc_rnga_data_present,
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.data_read = mxc_rnga_data_read
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};
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static int __init mxc_rnga_probe(struct platform_device *pdev)
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{
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int err = -ENODEV;
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struct clk *clk;
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struct resource *res, *mem;
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void __iomem *rng_base = NULL;
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if (rng_dev)
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return -EBUSY;
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clk = clk_get(&pdev->dev, "rng");
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "Could not get rng_clk!\n");
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err = PTR_ERR(clk);
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goto out;
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}
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clk_enable(clk);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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err = -ENOENT;
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goto err_region;
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}
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mem = request_mem_region(res->start, resource_size(res), pdev->name);
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if (mem == NULL) {
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err = -EBUSY;
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goto err_region;
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}
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rng_base = ioremap(res->start, resource_size(res));
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if (!rng_base) {
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err = -ENOMEM;
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goto err_ioremap;
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}
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mxc_rnga.priv = (unsigned long)rng_base;
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err = hwrng_register(&mxc_rnga);
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if (err) {
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dev_err(&pdev->dev, "MXC RNGA registering failed (%d)\n", err);
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goto err_register;
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}
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rng_dev = pdev;
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dev_info(&pdev->dev, "MXC RNGA Registered.\n");
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return 0;
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err_register:
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iounmap(rng_base);
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rng_base = NULL;
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err_ioremap:
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release_mem_region(res->start, resource_size(res));
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err_region:
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clk_disable(clk);
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clk_put(clk);
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out:
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return err;
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}
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static int __exit mxc_rnga_remove(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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void __iomem *rng_base = (void __iomem *)mxc_rnga.priv;
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struct clk *clk = clk_get(&pdev->dev, "rng");
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hwrng_unregister(&mxc_rnga);
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iounmap(rng_base);
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release_mem_region(res->start, resource_size(res));
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clk_disable(clk);
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clk_put(clk);
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return 0;
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}
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static struct platform_driver mxc_rnga_driver = {
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.driver = {
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.name = "mxc_rnga",
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.owner = THIS_MODULE,
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},
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.remove = __exit_p(mxc_rnga_remove),
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};
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static int __init mod_init(void)
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{
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return platform_driver_probe(&mxc_rnga_driver, mxc_rnga_probe);
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}
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static void __exit mod_exit(void)
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{
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platform_driver_unregister(&mxc_rnga_driver);
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}
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module_init(mod_init);
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module_exit(mod_exit);
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MODULE_AUTHOR("Freescale Semiconductor, Inc.");
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MODULE_DESCRIPTION("H/W RNGA driver for i.MX");
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MODULE_LICENSE("GPL");
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