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ath9k: defer ath_tx_setup_buffer setup to the first tx attempt during aggr
With sequence number and buffer allocation deferred to when they're needed for the first time, it becomes much easier to start dropping packets from the tid queue if necessary, e.g. when latency suddenly increases. This can lead to some future improvements in buffer management for better latency. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
fa05f87ad4
commit
44f1d26c16
@ -48,8 +48,9 @@ static u16 bits_per_symbol[][2] = {
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#define IS_HT_RATE(_rate) ((_rate) & 0x80)
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static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct list_head *bf_head);
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struct ath_atx_tid *tid, struct sk_buff *skb);
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static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
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int tx_flags, struct ath_txq *txq);
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static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
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struct ath_txq *txq, struct list_head *bf_q,
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struct ath_tx_status *ts, int txok, int sendbar);
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@ -61,6 +62,10 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
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int txok, bool update_rc);
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static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
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int seqno);
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static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
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struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct sk_buff *skb);
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enum {
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MCS_HT20,
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@ -164,14 +169,13 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
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fi = get_frame_info(skb);
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bf = fi->bf;
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list_add_tail(&bf->list, &bf_head);
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spin_unlock_bh(&txq->axq_lock);
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if (fi->retries) {
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if (bf && fi->retries) {
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list_add_tail(&bf->list, &bf_head);
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ath_tx_update_baw(sc, tid, bf->bf_state.seqno);
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ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 1);
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} else {
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ath_tx_send_normal(sc, txq, NULL, &bf_head);
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ath_tx_send_normal(sc, txq, NULL, skb);
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}
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spin_lock_bh(&txq->axq_lock);
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}
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@ -234,6 +238,13 @@ static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq,
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fi = get_frame_info(skb);
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bf = fi->bf;
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if (!bf) {
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spin_unlock(&txq->axq_lock);
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ath_tx_complete(sc, skb, ATH_TX_ERROR, txq);
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spin_lock(&txq->axq_lock);
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continue;
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}
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list_add_tail(&bf->list, &bf_head);
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if (fi->retries)
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@ -760,8 +771,14 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
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skb = skb_peek(&tid->buf_q);
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fi = get_frame_info(skb);
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bf = fi->bf;
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seqno = bf->bf_state.seqno;
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if (!fi->bf)
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bf = ath_tx_setup_buffer(sc, txq, tid, skb);
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if (!bf)
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continue;
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bf->bf_state.bf_type |= BUF_AMPDU;
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seqno = bf->bf_state.seqno;
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if (!bf_first)
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bf_first = bf;
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@ -1434,13 +1451,11 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
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}
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static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
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struct ath_buf *bf, struct ath_tx_control *txctl)
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struct sk_buff *skb, struct ath_tx_control *txctl)
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{
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struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu);
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struct ath_frame_info *fi = get_frame_info(skb);
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struct list_head bf_head;
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u16 seqno = bf->bf_state.seqno;
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bf->bf_state.bf_type |= BUF_AMPDU;
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struct ath_buf *bf;
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/*
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* Do not queue to h/w when any of the following conditions is true:
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@ -1450,25 +1465,29 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
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* - h/w queue depth exceeds low water mark
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*/
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if (!skb_queue_empty(&tid->buf_q) || tid->paused ||
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!BAW_WITHIN(tid->seq_start, tid->baw_size, seqno) ||
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!BAW_WITHIN(tid->seq_start, tid->baw_size, tid->seq_next) ||
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txctl->txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) {
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/*
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* Add this frame to software queue for scheduling later
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* for aggregation.
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*/
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TX_STAT_INC(txctl->txq->axq_qnum, a_queued_sw);
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__skb_queue_tail(&tid->buf_q, bf->bf_mpdu);
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__skb_queue_tail(&tid->buf_q, skb);
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if (!txctl->an || !txctl->an->sleeping)
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ath_tx_queue_tid(txctl->txq, tid);
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return;
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}
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bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb);
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if (!bf)
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return;
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bf->bf_state.bf_type |= BUF_AMPDU;
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INIT_LIST_HEAD(&bf_head);
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list_add(&bf->list, &bf_head);
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/* Add sub-frame to BAW */
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if (!fi->retries)
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ath_tx_addto_baw(sc, tid, seqno);
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ath_tx_addto_baw(sc, tid, bf->bf_state.seqno);
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/* Queue to h/w without aggregation */
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TX_STAT_INC(txctl->txq->axq_qnum, a_queued_hw);
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@ -1478,13 +1497,21 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
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}
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static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct list_head *bf_head)
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struct ath_atx_tid *tid, struct sk_buff *skb)
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{
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struct ath_frame_info *fi;
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struct ath_frame_info *fi = get_frame_info(skb);
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struct list_head bf_head;
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struct ath_buf *bf;
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bf = list_first_entry(bf_head, struct ath_buf, list);
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bf = fi->bf;
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if (!bf)
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bf = ath_tx_setup_buffer(sc, txq, tid, skb);
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if (!bf)
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return;
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INIT_LIST_HEAD(&bf_head);
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list_add_tail(&bf->list, &bf_head);
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bf->bf_state.bf_type &= ~BUF_AMPDU;
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/* update starting sequence number for subsequent ADDBA request */
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@ -1492,9 +1519,8 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
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INCR(tid->seq_start, IEEE80211_SEQ_MAX);
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bf->bf_lastbf = bf;
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fi = get_frame_info(bf->bf_mpdu);
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ath_buf_set_rate(sc, bf, fi->framelen);
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ath_tx_txqaddbuf(sc, txq, bf_head, false);
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ath_tx_txqaddbuf(sc, txq, &bf_head, false);
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TX_STAT_INC(txq->axq_qnum, queued);
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}
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@ -1717,6 +1743,10 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len)
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}
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/*
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* Assign a descriptor (and sequence number if necessary,
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* and map buffer for DMA. Frees skb on error
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*/
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static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
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struct ath_txq *txq,
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struct ath_atx_tid *tid,
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@ -1734,7 +1764,7 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
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bf = ath_tx_get_buffer(sc);
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if (!bf) {
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ath_dbg(common, ATH_DBG_XMIT, "TX buffers are full\n");
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return NULL;
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goto error;
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}
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ATH_TXBUF_RESET(bf);
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@ -1757,7 +1787,7 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
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ath_err(ath9k_hw_common(sc->sc_ah),
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"dma_mapping_error() on TX\n");
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ath_tx_return_buffer(sc, bf);
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return NULL;
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goto error;
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}
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frm_type = get_hw_packet_type(skb);
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@ -1779,18 +1809,20 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
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fi->bf = bf;
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return bf;
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error:
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dev_kfree_skb_any(skb);
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return NULL;
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}
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/* FIXME: tx power */
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static int ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,
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static void ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,
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struct ath_tx_control *txctl)
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{
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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struct list_head bf_head;
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struct ath_atx_tid *tid = NULL;
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struct ath_buf *bf;
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int ret = 0;
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u8 tidno;
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spin_lock_bh(&txctl->txq->axq_lock);
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@ -1803,21 +1835,16 @@ static int ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,
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WARN_ON(tid->ac->txq != txctl->txq);
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}
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bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb);
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if (unlikely(!bf)) {
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ret = -ENOMEM;
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goto out;
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}
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if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && tid) {
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/*
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* Try aggregation if it's a unicast data frame
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* and the destination is HT capable.
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*/
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ath_tx_send_ampdu(sc, tid, bf, txctl);
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ath_tx_send_ampdu(sc, tid, skb, txctl);
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} else {
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INIT_LIST_HEAD(&bf_head);
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list_add_tail(&bf->list, &bf_head);
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bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb);
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if (!bf)
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goto out;
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bf->bf_state.bfs_paprd = txctl->paprd;
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@ -1831,12 +1858,11 @@ static int ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,
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if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
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ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true);
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ath_tx_send_normal(sc, txctl->txq, tid, &bf_head);
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ath_tx_send_normal(sc, txctl->txq, tid, skb);
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}
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out:
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spin_unlock_bh(&txctl->txq->axq_lock);
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return ret;
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}
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/* Upon failure caller should free skb */
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@ -1904,7 +1930,8 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
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}
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spin_unlock_bh(&txq->axq_lock);
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return ath_tx_start_dma(sc, skb, txctl);
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ath_tx_start_dma(sc, skb, txctl);
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return 0;
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}
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/*****************/
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