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PCI: mvebu: Obey bridge PCI_COMMAND_MEM and PCI_COMMAND_IO bits
When PCI_COMMAND_MEMORY/PCI_COMMAND_IO are cleared, the bridge should not allocate windows or even look at the window limit/base registers. Otherwise we may set up bogus windows while the PCI core code performs discovery. The core will leave PCI_COMMAND_IO cleared if it doesn't need an IO window. Have mvebu_pcie_handle_*_change respect the bits, and call the change function whenever the bits changes. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
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@ -300,7 +300,8 @@ static void mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port)
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/* Are the new iobase/iolimit values invalid? */
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if (port->bridge.iolimit < port->bridge.iobase ||
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port->bridge.iolimitupper < port->bridge.iobaseupper) {
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port->bridge.iolimitupper < port->bridge.iobaseupper ||
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!(port->bridge.command & PCI_COMMAND_IO)) {
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/* If a window was configured, remove it */
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if (port->iowin_base) {
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@ -337,7 +338,8 @@ static void mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port)
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static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port)
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{
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/* Are the new membase/memlimit values invalid? */
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if (port->bridge.memlimit < port->bridge.membase) {
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if (port->bridge.memlimit < port->bridge.membase ||
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!(port->bridge.command & PCI_COMMAND_MEMORY)) {
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/* If a window was configured, remove it */
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if (port->memwin_base) {
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@ -485,8 +487,16 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port,
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switch (where & ~3) {
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case PCI_COMMAND:
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{
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u32 old = bridge->command;
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bridge->command = value & 0xffff;
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if ((old ^ bridge->command) & PCI_COMMAND_IO)
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mvebu_pcie_handle_iobase_change(port);
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if ((old ^ bridge->command) & PCI_COMMAND_MEMORY)
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mvebu_pcie_handle_membase_change(port);
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break;
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}
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case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_1:
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bridge->bar[((where & ~3) - PCI_BASE_ADDRESS_0) / 4] = value;
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