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KVM: x86: Force TLB flush on userspace changes to special registers
Userspace can directly modify the content of vCPU's CR0, CR3, and CR4 via KVM_SYNC_X86_SREGS and KVM_SET_SREGS{,2}. Make sure that KVM flushes guest TLB entries and paging-structure caches if a (partial) guest TLB flush is architecturally required based on the CRn changes. To keep things simple, flush whenever KVM resets the MMU context, i.e. if any bits in CR0, CR3, CR4, or EFER are modified. This is extreme overkill, but stuffing state from userspace is not such a hot path that preserving guest TLB state is a priority. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michal Luczaj <mhal@rbox.co> Link: https://lore.kernel.org/r/20230814222358.707877-3-mhal@rbox.co [sean: call out that the flushing on MMU context resets is for simplicity] Signed-off-by: Sean Christopherson <seanjc@google.com>
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@ -11564,8 +11564,10 @@ static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
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if (ret)
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return ret;
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if (mmu_reset_needed)
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if (mmu_reset_needed) {
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kvm_mmu_reset_context(vcpu);
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kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
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}
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max_bits = KVM_NR_INTERRUPTS;
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pending_vec = find_first_bit(
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@ -11606,8 +11608,10 @@ static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
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mmu_reset_needed = 1;
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vcpu->arch.pdptrs_from_userspace = true;
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}
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if (mmu_reset_needed)
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if (mmu_reset_needed) {
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kvm_mmu_reset_context(vcpu);
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kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
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}
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return 0;
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}
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