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b43: handle BCMA in bus switches
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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6cbab0d913
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42c9a45896
@ -1155,6 +1155,21 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
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}
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}
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#ifdef CONFIG_B43_BCMA
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static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode)
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{
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u32 flags = 0;
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if (gmode)
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flags = B43_BCMA_IOCTL_GMODE;
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flags |= B43_BCMA_IOCTL_PHY_CLKEN;
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flags |= B43_BCMA_IOCTL_PHY_BW_20MHZ; /* Make 20 MHz def */
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b43_device_enable(dev, flags);
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/* TODO: reset PHY */
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}
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#endif
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static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, bool gmode)
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{
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struct ssb_device *sdev = dev->dev->sdev;
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@ -1188,6 +1203,11 @@ void b43_wireless_core_reset(struct b43_wldev *dev, bool gmode)
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u32 macctl;
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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b43_bcma_wireless_core_reset(dev, gmode);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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b43_ssb_wireless_core_reset(dev, gmode);
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@ -2631,6 +2651,13 @@ static int b43_gpio_init(struct b43_wldev *dev)
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mask |= 0x0010; /* FIXME: This is redundant. */
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL,
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(bcma_cc_read32(&dev->dev->bdev->bus->drv_cc,
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BCMA_CC_GPIOCTL) & mask) | set);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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gpiodev = b43_ssb_gpio_dev(dev);
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@ -2651,6 +2678,12 @@ static void b43_gpio_cleanup(struct b43_wldev *dev)
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struct ssb_device *gpiodev;
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL,
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0);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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gpiodev = b43_ssb_gpio_dev(dev);
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@ -2733,6 +2766,16 @@ void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
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u32 tmp;
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL);
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if (on)
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tmp |= B43_BCMA_IOCTL_MACPHYCLKEN;
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else
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tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN;
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bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
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@ -2983,6 +3026,12 @@ static int b43_chip_init(struct b43_wldev *dev)
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b43_mac_phy_clock_set(dev, true);
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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/* FIXME: 0xE74 is quite common, but should be read from CC */
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b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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b43_write16(dev, B43_MMIO_POWERUP_DELAY,
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@ -3508,6 +3557,12 @@ static void b43_put_phy_into_reset(struct b43_wldev *dev)
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u32 tmp;
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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b43err(dev->wl,
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"Putting PHY into reset not supported on BCMA\n");
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
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@ -4404,6 +4459,12 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
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/* Enable IRQ routing to this device. */
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci,
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dev->dev->bdev, true);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore,
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@ -4834,6 +4895,13 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
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/* Get the PHY type. */
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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/* FIXME */
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have_2ghz_phy = 1;
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have_5ghz_phy = 0;
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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if (dev->dev->core_rev >= 5) {
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@ -609,6 +609,16 @@ static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
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return;
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL);
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if (force)
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tmp |= BCMA_IOCTL_FGC;
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else
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tmp &= ~BCMA_IOCTL_FGC;
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bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
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@ -965,6 +975,12 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
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b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc,
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0xFC00, 0xFC00);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco,
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@ -3614,6 +3630,12 @@ int b43_phy_initn(struct b43_wldev *dev)
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(sprom->boardflags_lo & B43_BFL_EXTLNA) &&
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(b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
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switch (dev->dev->bus_type) {
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#ifdef CONFIG_B43_BCMA
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case B43_BUS_BCMA:
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bcma_cc_set32(&dev->dev->bdev->bus->drv_cc,
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BCMA_CC_CHIPCTL, 0x40);
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break;
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#endif
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#ifdef CONFIG_B43_SSB
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case B43_BUS_SSB:
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chipco_set32(&dev->dev->sdev->bus->chipco,
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