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serial: 8250_pci: Replace custom pci_match_id() implementation
Replace pci_quatech_amcc() with generic pci_match_id(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211026133452.61657-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1063,13 +1063,6 @@ static int pci_asix_setup(struct serial_private *priv,
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return pci_default_setup(priv, board, port, idx);
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}
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/* Quatech devices have their own extra interface features */
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struct quatech_feature {
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u16 devid;
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bool amcc;
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};
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#define QPCR_TEST_FOR1 0x3F
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#define QPCR_TEST_GET1 0x00
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#define QPCR_TEST_FOR2 0x40
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@ -1085,42 +1078,30 @@ struct quatech_feature {
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#define QOPR_CLOCK_X8 0x0003
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#define QOPR_CLOCK_RATE_MASK 0x0003
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static struct quatech_feature quatech_cards[] = {
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{ PCI_DEVICE_ID_QUATECH_QSC100, 1 },
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{ PCI_DEVICE_ID_QUATECH_DSC100, 1 },
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{ PCI_DEVICE_ID_QUATECH_DSC100E, 0 },
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{ PCI_DEVICE_ID_QUATECH_DSC200, 1 },
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{ PCI_DEVICE_ID_QUATECH_DSC200E, 0 },
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{ PCI_DEVICE_ID_QUATECH_ESC100D, 1 },
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{ PCI_DEVICE_ID_QUATECH_ESC100M, 1 },
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{ PCI_DEVICE_ID_QUATECH_QSCP100, 1 },
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{ PCI_DEVICE_ID_QUATECH_DSCP100, 1 },
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{ PCI_DEVICE_ID_QUATECH_QSCP200, 1 },
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{ PCI_DEVICE_ID_QUATECH_DSCP200, 1 },
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{ PCI_DEVICE_ID_QUATECH_ESCLP100, 0 },
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{ PCI_DEVICE_ID_QUATECH_QSCLP100, 0 },
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{ PCI_DEVICE_ID_QUATECH_DSCLP100, 0 },
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{ PCI_DEVICE_ID_QUATECH_SSCLP100, 0 },
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{ PCI_DEVICE_ID_QUATECH_QSCLP200, 0 },
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{ PCI_DEVICE_ID_QUATECH_DSCLP200, 0 },
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{ PCI_DEVICE_ID_QUATECH_SSCLP200, 0 },
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{ PCI_DEVICE_ID_QUATECH_SPPXP_100, 0 },
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/* Quatech devices have their own extra interface features */
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static struct pci_device_id quatech_cards[] = {
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{ PCI_DEVICE_DATA(QUATECH, QSC100, 1) },
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{ PCI_DEVICE_DATA(QUATECH, DSC100, 1) },
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{ PCI_DEVICE_DATA(QUATECH, DSC100E, 0) },
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{ PCI_DEVICE_DATA(QUATECH, DSC200, 1) },
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{ PCI_DEVICE_DATA(QUATECH, DSC200E, 0) },
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{ PCI_DEVICE_DATA(QUATECH, ESC100D, 1) },
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{ PCI_DEVICE_DATA(QUATECH, ESC100M, 1) },
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{ PCI_DEVICE_DATA(QUATECH, QSCP100, 1) },
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{ PCI_DEVICE_DATA(QUATECH, DSCP100, 1) },
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{ PCI_DEVICE_DATA(QUATECH, QSCP200, 1) },
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{ PCI_DEVICE_DATA(QUATECH, DSCP200, 1) },
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{ PCI_DEVICE_DATA(QUATECH, ESCLP100, 0) },
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{ PCI_DEVICE_DATA(QUATECH, QSCLP100, 0) },
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{ PCI_DEVICE_DATA(QUATECH, DSCLP100, 0) },
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{ PCI_DEVICE_DATA(QUATECH, SSCLP100, 0) },
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{ PCI_DEVICE_DATA(QUATECH, QSCLP200, 0) },
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{ PCI_DEVICE_DATA(QUATECH, DSCLP200, 0) },
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{ PCI_DEVICE_DATA(QUATECH, SSCLP200, 0) },
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{ PCI_DEVICE_DATA(QUATECH, SPPXP_100, 0) },
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{ 0, }
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};
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static int pci_quatech_amcc(struct pci_dev *dev)
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{
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struct quatech_feature *qf = &quatech_cards[0];
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while (qf->devid) {
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if (qf->devid == dev->device)
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return qf->amcc;
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qf++;
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}
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pci_err(dev, "unknown port type '0x%04X'.\n", dev->device);
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return 0;
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};
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static int pci_quatech_rqopr(struct uart_8250_port *port)
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{
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unsigned long base = port->port.iobase;
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@ -1280,7 +1261,16 @@ static int pci_quatech_rs422(struct uart_8250_port *port)
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static int pci_quatech_init(struct pci_dev *dev)
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{
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if (pci_quatech_amcc(dev)) {
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const struct pci_device_id *match;
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bool amcc = false;
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match = pci_match_id(quatech_cards, dev);
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if (match)
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amcc = match->driver_data;
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else
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pci_err(dev, "unknown port type '0x%04X'.\n", dev->device);
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if (amcc) {
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unsigned long base = pci_resource_start(dev, 0);
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if (base) {
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u32 tmp;
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