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arm64: dts: rockchip: use less broad pinctrl for pcie3x1 on Radxa E25

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To avoid conflict with sdmmc_det, change pci3x1 pinctrl-0 name.
Only the reset-pin is actually needed.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240918073236.648-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
FUKAUMI Naoki 2024-09-18 16:32:35 +09:00 committed by Heiko Stuebner
parent 3ddf5cdb77
commit 409e01f327
1 changed files with 5 additions and 1 deletions
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6
arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
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@ -124,7 +124,7 @@
&pcie3x1 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1m0_pins>;
pinctrl-0 = <&pcie30x1_reset_h>;
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_minipcie>;
status = "okay";
@ -149,6 +149,10 @@
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x1_reset_h: pcie30x1-reset-h {
rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x2_reset_h: pcie30x2-reset-h {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};