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RDMA: Extend RDMA kernel ABI to support atomic write
1) Define new atomic write request/completion in kernel. 2) Define new atomic write capability in kernel. 3) Define new atomic write opcode for RC service in packet. Link: https://lore.kernel.org/r/1669905432-14-3-git-send-email-yangx.jy@fujitsu.com Signed-off-by: Xiao Yang <yangx.jy@fujitsu.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -84,6 +84,7 @@ enum {
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/* opcode 0x15 is reserved */
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IB_OPCODE_SEND_LAST_WITH_INVALIDATE = 0x16,
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IB_OPCODE_SEND_ONLY_WITH_INVALIDATE = 0x17,
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IB_OPCODE_ATOMIC_WRITE = 0x1D,
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/* real constants follow -- see comment about above IB_OPCODE()
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macro for more details */
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@ -112,6 +113,7 @@ enum {
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IB_OPCODE(RC, FETCH_ADD),
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IB_OPCODE(RC, SEND_LAST_WITH_INVALIDATE),
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IB_OPCODE(RC, SEND_ONLY_WITH_INVALIDATE),
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IB_OPCODE(RC, ATOMIC_WRITE),
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/* UC */
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IB_OPCODE(UC, SEND_FIRST),
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@ -270,6 +270,7 @@ enum ib_device_cap_flags {
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/* The device supports padding incoming writes to cacheline. */
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IB_DEVICE_PCI_WRITE_END_PADDING =
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IB_UVERBS_DEVICE_PCI_WRITE_END_PADDING,
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IB_DEVICE_ATOMIC_WRITE = IB_UVERBS_DEVICE_ATOMIC_WRITE,
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};
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enum ib_kernel_cap_flags {
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@ -982,6 +983,7 @@ enum ib_wc_opcode {
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IB_WC_BIND_MW = IB_UVERBS_WC_BIND_MW,
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IB_WC_LOCAL_INV = IB_UVERBS_WC_LOCAL_INV,
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IB_WC_LSO = IB_UVERBS_WC_TSO,
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IB_WC_ATOMIC_WRITE = IB_UVERBS_WC_ATOMIC_WRITE,
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IB_WC_REG_MR,
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IB_WC_MASKED_COMP_SWAP,
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IB_WC_MASKED_FETCH_ADD,
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@ -1325,6 +1327,7 @@ enum ib_wr_opcode {
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IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP,
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IB_WR_MASKED_ATOMIC_FETCH_AND_ADD =
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IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD,
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IB_WR_ATOMIC_WRITE = IB_UVERBS_WR_ATOMIC_WRITE,
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/* These are kernel only and can not be issued by userspace */
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IB_WR_REG_MR = 0x20,
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