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thermal/drivers/rcar_gen3_thermal: Remove R-Car H3 ES1.* handling
R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support and disable booting for this SoC. Public users only have ES2 onwards. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20230307163041.3815-7-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -14,7 +14,6 @@
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/sys_soc.h>
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#include <linux/thermal.h>
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#include "thermal_hwmon.h"
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@ -27,7 +26,6 @@
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#define REG_GEN3_IRQTEMP1 0x14
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#define REG_GEN3_IRQTEMP2 0x18
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#define REG_GEN3_IRQTEMP3 0x1C
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#define REG_GEN3_CTSR 0x20
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#define REG_GEN3_THCTR 0x20
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#define REG_GEN3_TEMP 0x28
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#define REG_GEN3_THCODE1 0x50
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@ -46,14 +44,6 @@
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#define IRQ_TEMPD2 BIT(4)
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#define IRQ_TEMPD3 BIT(5)
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/* CTSR bits */
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#define CTSR_PONM BIT(8)
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#define CTSR_AOUT BIT(7)
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#define CTSR_THBGR BIT(5)
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#define CTSR_VMEN BIT(4)
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#define CTSR_VMST BIT(1)
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#define CTSR_THSST BIT(0)
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/* THCTR bits */
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#define THCTR_PONM BIT(6)
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#define THCTR_THSST BIT(0)
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@ -88,8 +78,6 @@ struct rcar_gen3_thermal_priv {
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struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
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struct thermal_zone_device_ops ops;
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unsigned int num_tscs;
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void (*thermal_init)(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc);
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int ptat[3];
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};
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@ -248,11 +236,6 @@ static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
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return IRQ_HANDLED;
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}
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static const struct soc_device_attribute r8a7795es1[] = {
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{ .soc_id = "r8a7795", .revision = "ES1.*" },
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{ /* sentinel */ }
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};
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static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
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{
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unsigned int i;
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@ -311,34 +294,6 @@ static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
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return true;
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}
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static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc)
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{
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
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usleep_range(1000, 2000);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
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if (priv->ops.set_trips)
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
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IRQ_TEMPD1 | IRQ_TEMP2);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
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CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
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usleep_range(100, 200);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
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CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
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CTSR_VMST | CTSR_THSST);
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usleep_range(1000, 2000);
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}
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static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc)
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{
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@ -474,9 +429,6 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
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return -ENOMEM;
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priv->ops = rcar_gen3_tz_of_ops;
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priv->thermal_init = rcar_gen3_thermal_init;
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if (soc_device_match(r8a7795es1))
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priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
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platform_set_drvdata(pdev, priv);
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@ -516,7 +468,7 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
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for (i = 0; i < priv->num_tscs; i++) {
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struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
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priv->thermal_init(priv, tsc);
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rcar_gen3_thermal_init(priv, tsc);
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rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
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zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
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@ -563,7 +515,7 @@ static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
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for (i = 0; i < priv->num_tscs; i++) {
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struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
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priv->thermal_init(priv, tsc);
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rcar_gen3_thermal_init(priv, tsc);
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}
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return 0;
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