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ARM: tegra: clock: Rearrange static clock tables
Make the static clocks look more like the array of clocks so they can all be initalized with the same helper function. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
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@ -1775,7 +1775,7 @@ static struct clk_mux_sel mux_pclk[] = {
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.max_rate = _max, \
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.max_rate = _max, \
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}
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}
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struct clk tegra_periph_clks[] = {
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struct clk tegra_list_clks[] = {
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PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0),
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PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0),
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PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET),
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PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET),
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PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
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PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
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@ -1885,71 +1885,67 @@ struct clk_duplicate tegra_clk_duplicates[] = {
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.clk = ck, \
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.clk = ck, \
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}
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}
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struct clk_lookup tegra_clk_lookups[] = {
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struct clk *tegra_ptr_clks[] = {
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/* external root sources */
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&tegra_clk_32k,
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CLK(NULL, "32k_clk", &tegra_clk_32k),
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&tegra_pll_s,
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CLK(NULL, "pll_s", &tegra_pll_s),
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&tegra_clk_m,
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CLK(NULL, "clk_m", &tegra_clk_m),
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&tegra_pll_m,
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CLK(NULL, "pll_m", &tegra_pll_m),
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&tegra_pll_m_out1,
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CLK(NULL, "pll_m_out1", &tegra_pll_m_out1),
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&tegra_pll_c,
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CLK(NULL, "pll_c", &tegra_pll_c),
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&tegra_pll_c_out1,
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CLK(NULL, "pll_c_out1", &tegra_pll_c_out1),
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&tegra_pll_p,
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CLK(NULL, "pll_p", &tegra_pll_p),
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&tegra_pll_p_out1,
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CLK(NULL, "pll_p_out1", &tegra_pll_p_out1),
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&tegra_pll_p_out2,
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CLK(NULL, "pll_p_out2", &tegra_pll_p_out2),
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&tegra_pll_p_out3,
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CLK(NULL, "pll_p_out3", &tegra_pll_p_out3),
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&tegra_pll_p_out4,
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CLK(NULL, "pll_p_out4", &tegra_pll_p_out4),
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&tegra_pll_a,
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CLK(NULL, "pll_a", &tegra_pll_a),
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&tegra_pll_a_out0,
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CLK(NULL, "pll_a_out0", &tegra_pll_a_out0),
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&tegra_pll_d,
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CLK(NULL, "pll_d", &tegra_pll_d),
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&tegra_pll_d_out0,
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CLK(NULL, "pll_d_out0", &tegra_pll_d_out0),
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&tegra_pll_u,
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CLK(NULL, "pll_u", &tegra_pll_u),
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&tegra_pll_x,
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CLK(NULL, "pll_x", &tegra_pll_x),
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&tegra_pll_e,
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CLK(NULL, "pll_e", &tegra_pll_e),
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&tegra_clk_cclk,
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CLK(NULL, "cclk", &tegra_clk_cclk),
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&tegra_clk_sclk,
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CLK(NULL, "sclk", &tegra_clk_sclk),
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&tegra_clk_hclk,
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CLK(NULL, "hclk", &tegra_clk_hclk),
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&tegra_clk_pclk,
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CLK(NULL, "pclk", &tegra_clk_pclk),
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&tegra_clk_d,
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CLK(NULL, "clk_d", &tegra_clk_d),
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&tegra_dev1_clk,
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CLK(NULL, "clk_dev1", &tegra_dev1_clk),
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&tegra_dev2_clk,
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CLK(NULL, "clk_dev2", &tegra_dev2_clk),
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&tegra_clk_virtual_cpu,
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CLK(NULL, "cpu", &tegra_clk_virtual_cpu),
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&tegra_clk_blink,
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CLK(NULL, "blink", &tegra_clk_blink),
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};
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};
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static void tegra2_init_one_clock(struct clk *c)
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{
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clk_init(c);
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if (!c->lookup.dev_id && !c->lookup.con_id)
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c->lookup.con_id = c->name;
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c->lookup.clk = c;
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clkdev_add(&c->lookup);
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}
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void __init tegra2_init_clocks(void)
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void __init tegra2_init_clocks(void)
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{
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{
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int i;
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int i;
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struct clk_lookup *cl;
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struct clk *c;
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struct clk *c;
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struct clk_duplicate *cd;
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for (i = 0; i < ARRAY_SIZE(tegra_clk_lookups); i++) {
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for (i = 0; i < ARRAY_SIZE(tegra_ptr_clks); i++)
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cl = &tegra_clk_lookups[i];
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tegra2_init_one_clock(tegra_ptr_clks[i]);
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clk_init(cl->clk);
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clkdev_add(cl);
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}
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for (i = 0; i < ARRAY_SIZE(tegra_periph_clks); i++) {
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for (i = 0; i < ARRAY_SIZE(tegra_list_clks); i++)
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c = &tegra_periph_clks[i];
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tegra2_init_one_clock(&tegra_list_clks[i]);
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cl = &c->lookup;
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cl->clk = c;
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clk_init(cl->clk);
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clkdev_add(cl);
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}
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for (i = 0; i < ARRAY_SIZE(tegra_clk_duplicates); i++) {
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for (i = 0; i < ARRAY_SIZE(tegra_clk_duplicates); i++) {
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cd = &tegra_clk_duplicates[i];
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c = tegra_get_clock_by_name(tegra_clk_duplicates[i].name);
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c = tegra_get_clock_by_name(cd->name);
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if (!c) {
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if (c) {
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cl = &cd->lookup;
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cl->clk = c;
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clkdev_add(cl);
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} else {
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pr_err("%s: Unknown duplicate clock %s\n", __func__,
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pr_err("%s: Unknown duplicate clock %s\n", __func__,
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cd->name);
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tegra_clk_duplicates[i].name);
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continue;
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}
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}
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tegra_clk_duplicates[i].lookup.clk = c;
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clkdev_add(&tegra_clk_duplicates[i].lookup);
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}
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}
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init_audio_sync_clock_mux();
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init_audio_sync_clock_mux();
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