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rt2800pci: add rt2800_bbp_[read,write]() wrappers
Part of preparations for later code unification. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
John W. Linville
parent
eff6eced61
commit
3e2c9df7b9
@ -135,6 +135,18 @@ static void rt2800pci_bbp_read(struct rt2x00_dev *rt2x00dev,
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mutex_unlock(&rt2x00dev->csr_mutex);
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}
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static inline void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
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const unsigned int word, const u8 value)
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{
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rt2800pci_bbp_write(rt2x00dev, word, value);
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}
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static inline void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
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const unsigned int word, u8 *value)
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{
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rt2800pci_bbp_read(rt2x00dev, word, value);
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}
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static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev,
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const unsigned int word, const u8 value)
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{
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@ -399,8 +411,8 @@ static const struct rt2x00debug rt2800pci_rt2x00debug = {
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.word_count = EEPROM_SIZE / sizeof(u16),
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},
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.bbp = {
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.read = rt2800pci_bbp_read,
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.write = rt2800pci_bbp_write,
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.read = rt2800_bbp_read,
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.write = rt2800_bbp_write,
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.word_base = BBP_BASE,
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.word_size = sizeof(u8),
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.word_count = BBP_SIZE / sizeof(u8),
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@ -766,8 +778,8 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
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u8 r1;
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u8 r3;
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rt2800pci_bbp_read(rt2x00dev, 1, &r1);
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rt2800pci_bbp_read(rt2x00dev, 3, &r3);
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rt2800_bbp_read(rt2x00dev, 1, &r1);
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rt2800_bbp_read(rt2x00dev, 3, &r3);
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/*
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* Configure the TX antenna.
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@ -800,8 +812,8 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
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break;
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}
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rt2800pci_bbp_write(rt2x00dev, 3, r3);
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rt2800pci_bbp_write(rt2x00dev, 1, r1);
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rt2800_bbp_write(rt2x00dev, 3, r3);
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rt2800_bbp_write(rt2x00dev, 1, r1);
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}
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static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
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@ -944,26 +956,26 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
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/*
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* Change BBP settings
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*/
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rt2800pci_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
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rt2800pci_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
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rt2800pci_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
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rt2800pci_bbp_write(rt2x00dev, 86, 0);
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rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
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rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
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rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
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rt2800_bbp_write(rt2x00dev, 86, 0);
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if (rf->channel <= 14) {
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if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
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rt2800pci_bbp_write(rt2x00dev, 82, 0x62);
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rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
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rt2800_bbp_write(rt2x00dev, 82, 0x62);
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rt2800_bbp_write(rt2x00dev, 75, 0x46);
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} else {
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rt2800pci_bbp_write(rt2x00dev, 82, 0x84);
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rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
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rt2800_bbp_write(rt2x00dev, 82, 0x84);
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rt2800_bbp_write(rt2x00dev, 75, 0x50);
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}
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} else {
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rt2800pci_bbp_write(rt2x00dev, 82, 0xf2);
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rt2800_bbp_write(rt2x00dev, 82, 0xf2);
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if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
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rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
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rt2800_bbp_write(rt2x00dev, 75, 0x46);
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else
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rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
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rt2800_bbp_write(rt2x00dev, 75, 0x50);
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}
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rt2800_register_read(rt2x00dev, TX_BAND_CFG, ®);
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@ -995,23 +1007,23 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
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rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
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rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
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rt2800_bbp_read(rt2x00dev, 4, &bbp);
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rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
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rt2800pci_bbp_write(rt2x00dev, 4, bbp);
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rt2800_bbp_write(rt2x00dev, 4, bbp);
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rt2800pci_bbp_read(rt2x00dev, 3, &bbp);
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rt2800_bbp_read(rt2x00dev, 3, &bbp);
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rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
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rt2800pci_bbp_write(rt2x00dev, 3, bbp);
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rt2800_bbp_write(rt2x00dev, 3, bbp);
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if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
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if (conf_is_ht40(conf)) {
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rt2800pci_bbp_write(rt2x00dev, 69, 0x1a);
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rt2800pci_bbp_write(rt2x00dev, 70, 0x0a);
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rt2800pci_bbp_write(rt2x00dev, 73, 0x16);
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rt2800_bbp_write(rt2x00dev, 69, 0x1a);
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rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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rt2800_bbp_write(rt2x00dev, 73, 0x16);
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} else {
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rt2800pci_bbp_write(rt2x00dev, 69, 0x16);
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rt2800pci_bbp_write(rt2x00dev, 70, 0x08);
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rt2800pci_bbp_write(rt2x00dev, 73, 0x11);
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rt2800_bbp_write(rt2x00dev, 69, 0x16);
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rt2800_bbp_write(rt2x00dev, 70, 0x08);
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rt2800_bbp_write(rt2x00dev, 73, 0x11);
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}
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}
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@ -1025,9 +1037,9 @@ static void rt2800pci_config_txpower(struct rt2x00_dev *rt2x00dev,
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u32 value = TXPOWER_G_TO_DEV(txpower);
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u8 r1;
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rt2800pci_bbp_read(rt2x00dev, 1, &r1);
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rt2800_bbp_read(rt2x00dev, 1, &r1);
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rt2x00_set_field8(®, BBP1_TX_POWER, 0);
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rt2800pci_bbp_write(rt2x00dev, 1, r1);
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rt2800_bbp_write(rt2x00dev, 1, r1);
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rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, ®);
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rt2x00_set_field32(®, TX_PWR_CFG_0_1MBS, value);
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@ -1176,7 +1188,7 @@ static inline void rt2800pci_set_vgc(struct rt2x00_dev *rt2x00dev,
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struct link_qual *qual, u8 vgc_level)
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{
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if (qual->vgc_level != vgc_level) {
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rt2800pci_bbp_write(rt2x00dev, 66, vgc_level);
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rt2800_bbp_write(rt2x00dev, 66, vgc_level);
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qual->vgc_level = vgc_level;
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qual->vgc_level_reg = vgc_level;
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}
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@ -1720,7 +1732,7 @@ static int rt2800pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
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msleep(1);
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for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
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rt2800pci_bbp_read(rt2x00dev, 0, &value);
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rt2800_bbp_read(rt2x00dev, 0, &value);
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if ((value != 0xff) && (value != 0x00))
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return 0;
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udelay(REGISTER_BUSY_DELAY);
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@ -1741,33 +1753,33 @@ static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
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rt2800pci_wait_bbp_ready(rt2x00dev)))
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return -EACCES;
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rt2800pci_bbp_write(rt2x00dev, 65, 0x2c);
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rt2800pci_bbp_write(rt2x00dev, 66, 0x38);
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rt2800pci_bbp_write(rt2x00dev, 69, 0x12);
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rt2800pci_bbp_write(rt2x00dev, 70, 0x0a);
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rt2800pci_bbp_write(rt2x00dev, 73, 0x10);
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rt2800pci_bbp_write(rt2x00dev, 81, 0x37);
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rt2800pci_bbp_write(rt2x00dev, 82, 0x62);
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rt2800pci_bbp_write(rt2x00dev, 83, 0x6a);
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rt2800pci_bbp_write(rt2x00dev, 84, 0x99);
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rt2800pci_bbp_write(rt2x00dev, 86, 0x00);
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rt2800pci_bbp_write(rt2x00dev, 91, 0x04);
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rt2800pci_bbp_write(rt2x00dev, 92, 0x00);
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rt2800pci_bbp_write(rt2x00dev, 103, 0x00);
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rt2800pci_bbp_write(rt2x00dev, 105, 0x05);
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rt2800_bbp_write(rt2x00dev, 65, 0x2c);
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rt2800_bbp_write(rt2x00dev, 66, 0x38);
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rt2800_bbp_write(rt2x00dev, 69, 0x12);
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rt2800_bbp_write(rt2x00dev, 70, 0x0a);
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rt2800_bbp_write(rt2x00dev, 73, 0x10);
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rt2800_bbp_write(rt2x00dev, 81, 0x37);
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rt2800_bbp_write(rt2x00dev, 82, 0x62);
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rt2800_bbp_write(rt2x00dev, 83, 0x6a);
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rt2800_bbp_write(rt2x00dev, 84, 0x99);
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rt2800_bbp_write(rt2x00dev, 86, 0x00);
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rt2800_bbp_write(rt2x00dev, 91, 0x04);
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rt2800_bbp_write(rt2x00dev, 92, 0x00);
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rt2800_bbp_write(rt2x00dev, 103, 0x00);
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rt2800_bbp_write(rt2x00dev, 105, 0x05);
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if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
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rt2800pci_bbp_write(rt2x00dev, 69, 0x16);
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rt2800pci_bbp_write(rt2x00dev, 73, 0x12);
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rt2800_bbp_write(rt2x00dev, 69, 0x16);
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rt2800_bbp_write(rt2x00dev, 73, 0x12);
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}
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if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION)
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rt2800pci_bbp_write(rt2x00dev, 84, 0x19);
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rt2800_bbp_write(rt2x00dev, 84, 0x19);
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if (rt2x00_rt(&rt2x00dev->chip, RT3052)) {
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rt2800pci_bbp_write(rt2x00dev, 31, 0x08);
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rt2800pci_bbp_write(rt2x00dev, 78, 0x0e);
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rt2800pci_bbp_write(rt2x00dev, 80, 0x08);
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rt2800_bbp_write(rt2x00dev, 31, 0x08);
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rt2800_bbp_write(rt2x00dev, 78, 0x0e);
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rt2800_bbp_write(rt2x00dev, 80, 0x08);
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}
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for (i = 0; i < EEPROM_BBP_SIZE; i++) {
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@ -1776,7 +1788,7 @@ static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
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if (eeprom != 0xffff && eeprom != 0x0000) {
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reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
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value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
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rt2800pci_bbp_write(rt2x00dev, reg_id, value);
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rt2800_bbp_write(rt2x00dev, reg_id, value);
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}
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}
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@ -1795,9 +1807,9 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
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rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24);
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rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
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rt2800_bbp_read(rt2x00dev, 4, &bbp);
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rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
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rt2800pci_bbp_write(rt2x00dev, 4, bbp);
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rt2800_bbp_write(rt2x00dev, 4, bbp);
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rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
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rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
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@ -1806,13 +1818,13 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
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/*
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* Set power & frequency of passband test tone
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*/
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rt2800pci_bbp_write(rt2x00dev, 24, 0);
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rt2800_bbp_write(rt2x00dev, 24, 0);
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for (i = 0; i < 100; i++) {
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rt2800pci_bbp_write(rt2x00dev, 25, 0x90);
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rt2800_bbp_write(rt2x00dev, 25, 0x90);
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msleep(1);
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rt2800pci_bbp_read(rt2x00dev, 55, &passband);
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rt2800_bbp_read(rt2x00dev, 55, &passband);
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if (passband)
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break;
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}
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@ -1820,13 +1832,13 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
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/*
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* Set power & frequency of stopband test tone
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*/
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rt2800pci_bbp_write(rt2x00dev, 24, 0x06);
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rt2800_bbp_write(rt2x00dev, 24, 0x06);
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for (i = 0; i < 100; i++) {
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rt2800pci_bbp_write(rt2x00dev, 25, 0x90);
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rt2800_bbp_write(rt2x00dev, 25, 0x90);
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msleep(1);
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rt2800pci_bbp_read(rt2x00dev, 55, &stopband);
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rt2800_bbp_read(rt2x00dev, 55, &stopband);
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if ((passband - stopband) <= filter_target) {
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rfcsr24++;
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@ -1905,7 +1917,7 @@ static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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/*
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* Set back to initial state
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*/
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rt2800pci_bbp_write(rt2x00dev, 24, 0);
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rt2800_bbp_write(rt2x00dev, 24, 0);
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rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
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rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
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@ -1914,9 +1926,9 @@ static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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/*
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* set BBP back to BW20
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*/
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rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
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rt2800_bbp_read(rt2x00dev, 4, &bbp);
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rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
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rt2800pci_bbp_write(rt2x00dev, 4, bbp);
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rt2800_bbp_write(rt2x00dev, 4, bbp);
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return 0;
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}
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