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i.MX51: map TZIC dynamically
This looks cleaner and allows us to call mx51_revision later when we can use ioremap to determine the silicon revision dynamically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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parent
1b6a2b2d0f
commit
3d1bc8626c
@ -34,11 +34,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
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.pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
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.length = MX51_DEBUG_SIZE,
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.type = MT_DEVICE
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}, {
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.virtual = MX51_TZIC_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR),
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.length = MX51_TZIC_SIZE,
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.type = MT_DEVICE
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}, {
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.virtual = MX51_AIPS1_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
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@ -69,14 +64,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
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*/
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void __init mx51_map_io(void)
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{
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u32 tzic_addr;
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if (mx51_revision() < MX51_CHIP_REV_2_0)
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tzic_addr = 0x8FFFC000;
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else
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tzic_addr = 0xE0003000;
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mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr);
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mxc_set_cpu_type(MXC_CPU_MX51);
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mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
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mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
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@ -85,5 +72,17 @@ void __init mx51_map_io(void)
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void __init mx51_init_irq(void)
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{
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tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
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unsigned long tzic_addr;
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void __iomem *tzic_virt;
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if (mx51_revision() < MX51_CHIP_REV_2_0)
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tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
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else
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tzic_addr = MX51_TZIC_BASE_ADDR;
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tzic_virt = ioremap(tzic_addr, SZ_16K);
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if (!tzic_virt)
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panic("unable to map TZIC interrupt controller\n");
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tzic_init_irq(tzic_virt);
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}
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@ -14,7 +14,7 @@
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* FB100000 70000000 1M SPBA 0
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* FB000000 73F00000 1M AIPS 1
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* FB200000 83F00000 1M AIPS 2
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* FA100000 8FFFC000 16K TZIC (interrupt controller)
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* 8FFFC000 16K TZIC (interrupt controller)
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* 90000000 256M CSD0 SDRAM/DDR
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* A0000000 256M CSD1 SDRAM/DDR
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* B0000000 128M CS0 Flash
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@ -49,9 +49,8 @@
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#define MX51_GPU_BASE_ADDR 0x20000000
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#define MX51_GPU2D_BASE_ADDR 0xD0000000
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#define MX51_TZIC_BASE_ADDR 0x8FFFC000
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#define MX51_TZIC_BASE_ADDR_VIRT 0xFA100000
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#define MX51_TZIC_SIZE SZ_16K
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#define MX51_TZIC_BASE_ADDR_TO1 0x8FFFC000
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#define MX51_TZIC_BASE_ADDR 0xE0000000
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#define MX51_DEBUG_BASE_ADDR 0x60000000
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#define MX51_DEBUG_BASE_ADDR_VIRT 0xFA200000
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@ -232,7 +231,6 @@
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#define MX51_IO_ADDRESS(x) \
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(void __iomem *) \
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(MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) : \
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MX51_IS_MODULE(x, TZIC) ? MX51_TZIC_IO_ADDRESS(x) : \
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MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) : \
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MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \
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MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \
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@ -246,9 +244,6 @@
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#define MX51_IRAM_IO_ADDRESS(x) \
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(((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT)
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#define MX51_TZIC_IO_ADDRESS(x) \
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(((x) - MX51_TZIC_BASE_ADDR) + MX51_TZIC_BASE_ADDR_VIRT)
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#define MX51_DEBUG_IO_ADDRESS(x) \
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(((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT)
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