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arm64: dts: imx8dxl-ss-adma: update audio node power domains and IRQ number

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The power domains of i.MX8DXL's acm is difference i.MX8QXP. IRQ number of
sai[0..3] and spdif0 are also difference.

Update power domains information for i.MX8DXL.

Update sai[0..3] and spdif0's IRQ number for i.MX8DXL.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li 2024-04-25 11:34:42 -04:00 committed by Shawn Guo
parent 0bfafa0746
commit 3c9622455e
1 changed files with 64 additions and 0 deletions
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64
arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
View File

@ -17,6 +17,49 @@
/delete-node/ &sai5;
/delete-node/ &sai5_lpcg;
&acm {
compatible = "fsl,imx8dxl-acm";
power-domains = <&pd IMX_SC_R_AUDIO_CLK_0>,
<&pd IMX_SC_R_AUDIO_CLK_1>,
<&pd IMX_SC_R_MCLK_OUT_0>,
<&pd IMX_SC_R_MCLK_OUT_1>,
<&pd IMX_SC_R_AUDIO_PLL_0>,
<&pd IMX_SC_R_AUDIO_PLL_1>,
<&pd IMX_SC_R_ASRC_0>,
<&pd IMX_SC_R_SAI_0>,
<&pd IMX_SC_R_SAI_1>,
<&pd IMX_SC_R_SAI_2>,
<&pd IMX_SC_R_SAI_3>,
<&pd IMX_SC_R_SPDIF_0>,
<&pd IMX_SC_R_MQS_0>;
clocks = <&aud_rec0_lpcg IMX_LPCG_CLK_0>,
<&aud_rec1_lpcg IMX_LPCG_CLK_0>,
<&aud_pll_div0_lpcg IMX_LPCG_CLK_0>,
<&aud_pll_div1_lpcg IMX_LPCG_CLK_0>,
<&clk_ext_aud_mclk0>,
<&clk_ext_aud_mclk1>,
<&clk_spdif0_rx>,
<&clk_sai0_rx_bclk>,
<&clk_sai0_tx_bclk>,
<&clk_sai1_rx_bclk>,
<&clk_sai1_tx_bclk>,
<&clk_sai2_rx_bclk>,
<&clk_sai3_rx_bclk>;
clock-names = "aud_rec_clk0_lpcg_clk",
"aud_rec_clk1_lpcg_clk",
"aud_pll_div_clk0_lpcg_clk",
"aud_pll_div_clk1_lpcg_clk",
"ext_aud_mclk0",
"ext_aud_mclk1",
"spdif0_rx",
"sai0_rx_bclk",
"sai0_tx_bclk",
"sai1_rx_bclk",
"sai1_tx_bclk",
"sai2_rx_bclk",
"sai3_rx_bclk";
};
&audio_ipg_clk {
clock-frequency = <160000000>;
};
@ -191,3 +234,24 @@
&lpspi3 {
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
};
&sai0 {
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
};
&sai1 {
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
};
&sai2 {
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
};
&sai3 {
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
};
&spdif0 {
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, /* rx */
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>; /* tx */
};