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Qualcomm driver updates for v5.20
This introduces a new driver that requests interconnect bandwidth based on throughput measurements of the bwmon hardware blocks found associated with, among other things, the CPU subsystem on many Qualcomm platforms. It introduces support for the SCM wrapper driver to vote for interconnect bandwidth for operations that needs bandwidth to the crypto engine. This ensures both performance and guards against issues caused by lacking votes for this path. The socinfo driver gains knowledge about the SC7180P SoC. It contains a range of fixes for spelling mistakes, refcount leaks in various drivers and removes some redundant code from the apr remove path. The SCM DT bindings are updated to declare support for QCS404, SM6125 and SDX65. The command db driver has a strncpy() converted to strscpy_pad() and then back again with proper documentation to why this was the right API. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLLop4bHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F3TMP/ieGyulFlvASz8TxfZyL E0nJi29vPdGNfrQTe4Uijtn5v1eQzlunNfWfw2f3+hI2rhs94Y4TuFdHBNU7rTVo Ui0aFRRmlq3FZlc0KwUhyAP8tvI59Tna+w/8UgIqcKQpSiLNrYRQfyBGhUfMTI97 SzwSklRNNTFhIa31n6F4+K9uWwlRBgavoVHaNZw4iJaoC5VKXwcROMLOzgZFh7BB dJgdKxnOhKNGAPq6w+WSxbvzF2bdX0GvwcaFJDvXtquEVk7sxEWmEwxhcFpuu1BJ WtOyb+GCrxntk3n7tq333ZPVCZBlwePXXP+Bn5Z+P5stbiSFDso4irZzGEScmlyi HRhN2h7Mqh/7KkXbkEYwISqL/T+EXuQThFV8l5hodCF2v2bPRIeRoz3a5Z1mZb7H M4eoldB0Ow4dcBaJppJ9Ux+xMEqZ7hrXvQmpQdtHi3ty3QceKwjA0byJK2nmwttt GmibYaFsm4cynsCIYqclxnSm55rrq+doKE6G5gn6gG8Qijg+TDOAVLKDS6heenH3 9WCSeYUR4Wnyn6EUTEEfJamErhsVwKJYhLNfzfpst3+6RAoRM+C/js+S0fFqVImC 1lWRe64nCoGp1QR+h/f8SltnPUfjvCuU5i2pjO+vErq8zo21vcFGuvReps6fDZxh /NIw/dMRJMuZEmIv7KBZ6c6q =AHeW -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLN4SUACgkQmmx57+YA GNnCRA//bthrnU+D0KiuNogJASZZWs1y+PsMHbu27JNZMCaR14+sBKiNGhkfivKt 6lqZIBSn49OCfL/SGg0E7TTZ/aMkbj+HU6aPxf6417gu1LhICOTZX81ffijwHlZu POzvwcTWRMbIlYA/JD68y81uL2jWUpiqLXtPrzzjiEK87MR9OLEjJ/YIXciyOqaX ao+/TW0dqHYibxWJQWb98HfuUCL0ZC9tkX3iYBu0yM2y9XJ5dVRfG6Rs++H6X83S MIMqKbygFZ9PawzdHuPJDOv5su7PH5Sh6pUGXsxWXtAmVQESBeoRqO0KsAns8Tmi +38olZGOuELDo4nllrPrh2fWxQKmrVolXRmwv4sq/yqgsrkXutcJdUVb2XxeiJwt mKLDaYr1vN+YuR7XK2B2a68hFFW6a804c3cttXvp5Z4KcNNQmSiT71sILX8vqSmO +d5URU7oSbv6c6CqTTP7aAF+sfcZiHHrRoI3IJBzUmtczNp7Eq/7cT8OZMs5eMk7 yFIIdmr4fL4MvMmYMoibL7dCOpFfVoqlveAukG9utDpziXyMzNDZ89PMmjpdU2nR nLrwLe6NaB8h4B6GKO3HZqdiXHkP069+pKy1hOyPavp6g8qVo2JZxwQku4r0onAU jy+KhfRGb7W7mnC/hI5UtOQwGVx9S2RkUHEyaL3QNEjAXpDOeQw= =0Kp7 -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.20 This introduces a new driver that requests interconnect bandwidth based on throughput measurements of the bwmon hardware blocks found associated with, among other things, the CPU subsystem on many Qualcomm platforms. It introduces support for the SCM wrapper driver to vote for interconnect bandwidth for operations that needs bandwidth to the crypto engine. This ensures both performance and guards against issues caused by lacking votes for this path. The socinfo driver gains knowledge about the SC7180P SoC. It contains a range of fixes for spelling mistakes, refcount leaks in various drivers and removes some redundant code from the apr remove path. The SCM DT bindings are updated to declare support for QCS404, SM6125 and SDX65. The command db driver has a strncpy() converted to strscpy_pad() and then back again with proper documentation to why this was the right API. * tag 'qcom-drivers-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: icc-bwmon: Add bandwidth monitoring driver dt-bindings: interconnect: qcom,msm8998-cpu-bwmon: add BWMON device soc/qcom: Make QCOM_RPMPD select PM_GENERIC_DOMAINS/_OF soc: qcom: aoss: Fix refcount leak in qmp_cooling_devices_register soc: qcom: llcc: Fix syntax errors in comments soc: qcom: ocmem: Fix refcount leak in of_get_ocmem dt-bindings: soc: qcom,wcnss: remove unneeded ref for names firmware: qcom_scm: Add bw voting support to the SCM interface dt-bindings: firmware: qcom-scm: Add interconnects property soc: qcom: cmd-db: replace strscpy_pad() with strncpy() dt-bindings: firmware: scm: Add compatible for SDX65 dt-bindings: arm: qcom: switch maintainer to Bjorn soc: qcom: rpmhpd: fix typos in comment soc: qcom: correct kerneldoc soc: qcom: cmd-db: replace strncpy() with strscpy_pad() firmware: qcom_scm-legacy: correct kerneldoc dt-bindings: firmware: document Qualcomm QCS404 and SM6125 SCM soc: qcom: apr: Drop redundant check in .remove() firmware: qcom_scm: drop unexpected word "the" soc: qcom: socinfo: Add an ID for sc7180P Link: https://lore.kernel.org/r/20220712021830.1271398-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
3c37074f0d
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: QCOM device tree bindings
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maintainers:
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- Stephen Boyd <sboyd@codeaurora.org>
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description: |
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Some qcom based bootloaders identify the dtb blob based on a set of
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@ -23,10 +23,13 @@ Required properties:
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* "qcom,scm-msm8994"
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* "qcom,scm-msm8996"
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* "qcom,scm-msm8998"
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* "qcom,scm-qcs404"
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* "qcom,scm-sc7180"
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* "qcom,scm-sc7280"
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* "qcom,scm-sm6125"
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* "qcom,scm-sdm845"
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* "qcom,scm-sdx55"
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* "qcom,scm-sdx65"
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* "qcom,scm-sm6350"
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* "qcom,scm-sm8150"
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* "qcom,scm-sm8250"
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@ -43,6 +46,7 @@ Required properties:
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clock and "bus" for the bus clock per the requirements of the compatible.
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- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
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download mode control register (optional)
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- interconnects: Specifies the bandwidth requirements of the SCM interface (optional)
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Example for MSM8916:
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@ -0,0 +1,86 @@
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Interconnect Bandwidth Monitor
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maintainers:
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- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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description: |
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Bandwidth Monitor measures current throughput on buses between various NoC
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fabrics and provides information when it crosses configured thresholds.
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Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
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- Measuring the bandwidth between CPUs and Last Level Cache Controller -
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called just BWMON,
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- Measuring the bandwidth between Last Level Cache Controller and memory
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(DDR) - called LLCC BWMON.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- qcom,sdm845-bwmon
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- const: qcom,msm8998-bwmon
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- const: qcom,msm8998-bwmon # BWMON v4
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interconnects:
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maxItems: 1
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interrupts:
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maxItems: 1
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operating-points-v2: true
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opp-table: true
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reg:
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# BWMON v4 (currently described) and BWMON v5 use one register address
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# space. BWMON v2 uses two register spaces - not yet described.
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maxItems: 1
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required:
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- compatible
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- interconnects
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- interrupts
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- operating-points-v2
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- opp-table
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interconnect/qcom,sdm845.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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pmu@1436400 {
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compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
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reg = <0x01436400 0x600>;
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interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
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interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
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operating-points-v2 = <&cpu_bwmon_opp_table>;
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cpu_bwmon_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-0 {
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opp-peak-kBps = <4800000>;
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};
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opp-1 {
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opp-peak-kBps = <9216000>;
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};
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opp-2 {
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opp-peak-kBps = <15052800>;
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};
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opp-3 {
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opp-peak-kBps = <20889600>;
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};
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opp-4 {
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opp-peak-kBps = <25497600>;
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};
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};
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};
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@ -77,7 +77,6 @@ properties:
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Should reference the tx-enable and tx-rings-empty SMEM states.
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qcom,smem-state-names:
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$ref: /schemas/types.yaml#/definitions/string-array
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items:
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- const: tx-enable
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- const: tx-rings-empty
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@ -16589,6 +16589,13 @@ S: Maintained
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F: Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
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F: drivers/i2c/busses/i2c-qcom-cci.c
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QUALCOMM INTERCONNECT BWMON DRIVER
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M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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L: linux-arm-msm@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
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F: drivers/soc/qcom/icc-bwmon.c
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QUALCOMM IOMMU
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M: Rob Clark <robdclark@gmail.com>
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L: iommu@lists.linux-foundation.org
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@ -120,6 +120,9 @@ static void __scm_legacy_do(const struct arm_smccc_args *smc,
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/**
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* scm_legacy_call() - Sends a command to the SCM and waits for the command to
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* finish processing.
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* @dev: device
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* @desc: descriptor structure containing arguments and return values
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* @res: results from SMC call
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*
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* A note on cache maintenance:
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* Note that any buffers that are expected to be accessed by the secure world
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@ -211,6 +214,7 @@ out:
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/**
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* scm_legacy_call_atomic() - Send an atomic SCM command with up to 5 arguments
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* and 3 return values
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* @unused: device, legacy argument, not used, can be NULL
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* @desc: SCM call descriptor containing arguments
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* @res: SCM call return values
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*
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@ -7,6 +7,7 @@
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#include <linux/cpumask.h>
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#include <linux/export.h>
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#include <linux/dma-mapping.h>
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#include <linux/interconnect.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/qcom_scm.h>
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@ -31,8 +32,13 @@ struct qcom_scm {
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struct clk *core_clk;
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struct clk *iface_clk;
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struct clk *bus_clk;
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struct icc_path *path;
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struct reset_controller_dev reset;
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/* control access to the interconnect path */
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struct mutex scm_bw_lock;
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int scm_vote_count;
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u64 dload_mode_addr;
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};
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@ -99,6 +105,42 @@ static void qcom_scm_clk_disable(void)
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clk_disable_unprepare(__scm->bus_clk);
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}
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static int qcom_scm_bw_enable(void)
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{
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int ret = 0;
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if (!__scm->path)
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return 0;
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if (IS_ERR(__scm->path))
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return -EINVAL;
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mutex_lock(&__scm->scm_bw_lock);
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if (!__scm->scm_vote_count) {
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ret = icc_set_bw(__scm->path, 0, UINT_MAX);
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if (ret < 0) {
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dev_err(__scm->dev, "failed to set bandwidth request\n");
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goto err_bw;
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}
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}
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__scm->scm_vote_count++;
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err_bw:
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mutex_unlock(&__scm->scm_bw_lock);
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return ret;
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}
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static void qcom_scm_bw_disable(void)
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{
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if (IS_ERR_OR_NULL(__scm->path))
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return;
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mutex_lock(&__scm->scm_bw_lock);
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if (__scm->scm_vote_count-- == 1)
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icc_set_bw(__scm->path, 0, 0);
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mutex_unlock(&__scm->scm_bw_lock);
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}
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enum qcom_scm_convention qcom_scm_convention = SMC_CONVENTION_UNKNOWN;
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static DEFINE_SPINLOCK(scm_query_lock);
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@ -444,10 +486,15 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
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if (ret)
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goto out;
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ret = qcom_scm_bw_enable();
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if (ret)
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return ret;
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desc.args[1] = mdata_phys;
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ret = qcom_scm_call(__scm->dev, &desc, &res);
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qcom_scm_bw_disable();
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qcom_scm_clk_disable();
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out:
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@ -507,7 +554,12 @@ int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)
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if (ret)
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return ret;
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ret = qcom_scm_bw_enable();
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if (ret)
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return ret;
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ret = qcom_scm_call(__scm->dev, &desc, &res);
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qcom_scm_bw_disable();
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qcom_scm_clk_disable();
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return ret ? : res.result[0];
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@ -537,7 +589,12 @@ int qcom_scm_pas_auth_and_reset(u32 peripheral)
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if (ret)
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return ret;
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ret = qcom_scm_bw_enable();
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if (ret)
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return ret;
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ret = qcom_scm_call(__scm->dev, &desc, &res);
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qcom_scm_bw_disable();
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qcom_scm_clk_disable();
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return ret ? : res.result[0];
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@ -566,8 +623,13 @@ int qcom_scm_pas_shutdown(u32 peripheral)
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if (ret)
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return ret;
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ret = qcom_scm_bw_enable();
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if (ret)
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return ret;
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ret = qcom_scm_call(__scm->dev, &desc, &res);
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qcom_scm_bw_disable();
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qcom_scm_clk_disable();
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return ret ? : res.result[0];
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@ -1277,8 +1339,15 @@ static int qcom_scm_probe(struct platform_device *pdev)
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if (ret < 0)
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return ret;
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mutex_init(&scm->scm_bw_lock);
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clks = (unsigned long)of_device_get_match_data(&pdev->dev);
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scm->path = devm_of_icc_get(&pdev->dev, NULL);
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if (IS_ERR(scm->path))
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return dev_err_probe(&pdev->dev, PTR_ERR(scm->path),
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"failed to acquire interconnect path\n");
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scm->core_clk = devm_clk_get(&pdev->dev, "core");
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if (IS_ERR(scm->core_clk)) {
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if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER)
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@ -1337,7 +1406,7 @@ static int qcom_scm_probe(struct platform_device *pdev)
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/*
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* If requested enable "download mode", from this point on warmboot
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* will cause the the boot stages to enter download mode, unless
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* will cause the boot stages to enter download mode, unless
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* disabled below by a clean shutdown/reboot.
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*/
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if (download_mode)
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@ -130,6 +130,8 @@ config QCOM_RPMHPD
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config QCOM_RPMPD
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tristate "Qualcomm RPM Power domain driver"
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depends on QCOM_SMD_RPM
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select PM_GENERIC_DOMAINS
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select PM_GENERIC_DOMAINS_OF
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help
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QCOM RPM Power domain driver to support power-domains with
|
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performance states. The driver communicates a performance state
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@ -228,4 +230,19 @@ config QCOM_APR
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application processor and QDSP6. APR is
|
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used by audio driver to configure QDSP6
|
||||
ASM, ADM and AFE modules.
|
||||
|
||||
config QCOM_ICC_BWMON
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tristate "QCOM Interconnect Bandwidth Monitor driver"
|
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depends on ARCH_QCOM || COMPILE_TEST
|
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select PM_OPP
|
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help
|
||||
Sets up driver monitoring bandwidth on various interconnects and
|
||||
based on that voting for interconnect bandwidth, adjusting their
|
||||
speed to current demand.
|
||||
Current implementation brings support for BWMON v4, used for example
|
||||
on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last
|
||||
Level Cache (memnoc). Usage of this BWMON allows to remove some of
|
||||
the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high
|
||||
memory throughput even with lower CPU frequencies.
|
||||
|
||||
endmenu
|
||||
|
||||
@ -28,3 +28,4 @@ obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
|
||||
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
|
||||
obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
|
||||
obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
|
||||
obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o
|
||||
|
||||
@ -377,17 +377,14 @@ static int apr_device_probe(struct device *dev)
|
||||
static void apr_device_remove(struct device *dev)
|
||||
{
|
||||
struct apr_device *adev = to_apr_device(dev);
|
||||
struct apr_driver *adrv;
|
||||
struct apr_driver *adrv = to_apr_driver(dev->driver);
|
||||
struct packet_router *apr = dev_get_drvdata(adev->dev.parent);
|
||||
|
||||
if (dev->driver) {
|
||||
adrv = to_apr_driver(dev->driver);
|
||||
if (adrv->remove)
|
||||
adrv->remove(adev);
|
||||
spin_lock(&apr->svcs_lock);
|
||||
idr_remove(&apr->svcs_idr, adev->svc.id);
|
||||
spin_unlock(&apr->svcs_lock);
|
||||
}
|
||||
if (adrv->remove)
|
||||
adrv->remove(adev);
|
||||
spin_lock(&apr->svcs_lock);
|
||||
idr_remove(&apr->svcs_idr, adev->svc.id);
|
||||
spin_unlock(&apr->svcs_lock);
|
||||
}
|
||||
|
||||
static int apr_uevent(struct device *dev, struct kobj_uevent_env *env)
|
||||
|
||||
@ -141,13 +141,17 @@ static int cmd_db_get_header(const char *id, const struct entry_header **eh,
|
||||
const struct rsc_hdr *rsc_hdr;
|
||||
const struct entry_header *ent;
|
||||
int ret, i, j;
|
||||
u8 query[8];
|
||||
u8 query[sizeof(ent->id)] __nonstring;
|
||||
|
||||
ret = cmd_db_ready();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Pad out query string to same length as in DB */
|
||||
/*
|
||||
* Pad out query string to same length as in DB. NOTE: the output
|
||||
* query string is not necessarily '\0' terminated if it bumps up
|
||||
* against the max size. That's OK and expected.
|
||||
*/
|
||||
strncpy(query, id, sizeof(query));
|
||||
|
||||
for (i = 0; i < MAX_SLV_ID; i++) {
|
||||
|
||||
421
drivers/soc/qcom/icc-bwmon.c
Normal file
421
drivers/soc/qcom/icc-bwmon.c
Normal file
@ -0,0 +1,421 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
|
||||
* Copyright (C) 2021-2022 Linaro Ltd
|
||||
* Author: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, based on
|
||||
* previous work of Thara Gopinath and msm-4.9 downstream sources.
|
||||
*/
|
||||
#include <linux/interconnect.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_opp.h>
|
||||
#include <linux/sizes.h>
|
||||
|
||||
/*
|
||||
* The BWMON samples data throughput within 'sample_ms' time. With three
|
||||
* configurable thresholds (Low, Medium and High) gives four windows (called
|
||||
* zones) of current bandwidth:
|
||||
*
|
||||
* Zone 0: byte count < THRES_LO
|
||||
* Zone 1: THRES_LO < byte count < THRES_MED
|
||||
* Zone 2: THRES_MED < byte count < THRES_HIGH
|
||||
* Zone 3: THRES_HIGH < byte count
|
||||
*
|
||||
* Zones 0 and 2 are not used by this driver.
|
||||
*/
|
||||
|
||||
/* Internal sampling clock frequency */
|
||||
#define HW_TIMER_HZ 19200000
|
||||
|
||||
#define BWMON_GLOBAL_IRQ_STATUS 0x0
|
||||
#define BWMON_GLOBAL_IRQ_CLEAR 0x8
|
||||
#define BWMON_GLOBAL_IRQ_ENABLE 0xc
|
||||
#define BWMON_GLOBAL_IRQ_ENABLE_ENABLE BIT(0)
|
||||
|
||||
#define BWMON_IRQ_STATUS 0x100
|
||||
#define BWMON_IRQ_STATUS_ZONE_SHIFT 4
|
||||
#define BWMON_IRQ_CLEAR 0x108
|
||||
#define BWMON_IRQ_ENABLE 0x10c
|
||||
#define BWMON_IRQ_ENABLE_ZONE1_SHIFT 5
|
||||
#define BWMON_IRQ_ENABLE_ZONE2_SHIFT 6
|
||||
#define BWMON_IRQ_ENABLE_ZONE3_SHIFT 7
|
||||
#define BWMON_IRQ_ENABLE_MASK (BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT) | \
|
||||
BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT))
|
||||
|
||||
#define BWMON_ENABLE 0x2a0
|
||||
#define BWMON_ENABLE_ENABLE BIT(0)
|
||||
|
||||
#define BWMON_CLEAR 0x2a4
|
||||
#define BWMON_CLEAR_CLEAR BIT(0)
|
||||
|
||||
#define BWMON_SAMPLE_WINDOW 0x2a8
|
||||
#define BWMON_THRESHOLD_HIGH 0x2ac
|
||||
#define BWMON_THRESHOLD_MED 0x2b0
|
||||
#define BWMON_THRESHOLD_LOW 0x2b4
|
||||
|
||||
#define BWMON_ZONE_ACTIONS 0x2b8
|
||||
/*
|
||||
* Actions to perform on some zone 'z' when current zone hits the threshold:
|
||||
* Increment counter of zone 'z'
|
||||
*/
|
||||
#define BWMON_ZONE_ACTIONS_INCREMENT(z) (0x2 << ((z) * 2))
|
||||
/* Clear counter of zone 'z' */
|
||||
#define BWMON_ZONE_ACTIONS_CLEAR(z) (0x1 << ((z) * 2))
|
||||
|
||||
/* Zone 0 threshold hit: Clear zone count */
|
||||
#define BWMON_ZONE_ACTIONS_ZONE0 (BWMON_ZONE_ACTIONS_CLEAR(0))
|
||||
|
||||
/* Zone 1 threshold hit: Increment zone count & clear lower zones */
|
||||
#define BWMON_ZONE_ACTIONS_ZONE1 (BWMON_ZONE_ACTIONS_INCREMENT(1) | \
|
||||
BWMON_ZONE_ACTIONS_CLEAR(0))
|
||||
|
||||
/* Zone 2 threshold hit: Increment zone count & clear lower zones */
|
||||
#define BWMON_ZONE_ACTIONS_ZONE2 (BWMON_ZONE_ACTIONS_INCREMENT(2) | \
|
||||
BWMON_ZONE_ACTIONS_CLEAR(1) | \
|
||||
BWMON_ZONE_ACTIONS_CLEAR(0))
|
||||
|
||||
/* Zone 3 threshold hit: Increment zone count & clear lower zones */
|
||||
#define BWMON_ZONE_ACTIONS_ZONE3 (BWMON_ZONE_ACTIONS_INCREMENT(3) | \
|
||||
BWMON_ZONE_ACTIONS_CLEAR(2) | \
|
||||
BWMON_ZONE_ACTIONS_CLEAR(1) | \
|
||||
BWMON_ZONE_ACTIONS_CLEAR(0))
|
||||
/* Value for BWMON_ZONE_ACTIONS */
|
||||
#define BWMON_ZONE_ACTIONS_DEFAULT (BWMON_ZONE_ACTIONS_ZONE0 | \
|
||||
BWMON_ZONE_ACTIONS_ZONE1 << 8 | \
|
||||
BWMON_ZONE_ACTIONS_ZONE2 << 16 | \
|
||||
BWMON_ZONE_ACTIONS_ZONE3 << 24)
|
||||
|
||||
/*
|
||||
* There is no clear documentation/explanation of BWMON_THRESHOLD_COUNT
|
||||
* register. Based on observations, this is number of times one threshold has to
|
||||
* be reached, to trigger interrupt in given zone.
|
||||
*
|
||||
* 0xff are maximum values meant to ignore the zones 0 and 2.
|
||||
*/
|
||||
#define BWMON_THRESHOLD_COUNT 0x2bc
|
||||
#define BWMON_THRESHOLD_COUNT_ZONE1_SHIFT 8
|
||||
#define BWMON_THRESHOLD_COUNT_ZONE2_SHIFT 16
|
||||
#define BWMON_THRESHOLD_COUNT_ZONE3_SHIFT 24
|
||||
#define BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT 0xff
|
||||
#define BWMON_THRESHOLD_COUNT_ZONE2_DEFAULT 0xff
|
||||
|
||||
/* BWMONv4 count registers use count unit of 64 kB */
|
||||
#define BWMON_COUNT_UNIT_KB 64
|
||||
#define BWMON_ZONE_COUNT 0x2d8
|
||||
#define BWMON_ZONE_MAX(zone) (0x2e0 + 4 * (zone))
|
||||
|
||||
struct icc_bwmon_data {
|
||||
unsigned int sample_ms;
|
||||
unsigned int default_highbw_kbps;
|
||||
unsigned int default_medbw_kbps;
|
||||
unsigned int default_lowbw_kbps;
|
||||
u8 zone1_thres_count;
|
||||
u8 zone3_thres_count;
|
||||
};
|
||||
|
||||
struct icc_bwmon {
|
||||
struct device *dev;
|
||||
void __iomem *base;
|
||||
int irq;
|
||||
|
||||
unsigned int default_lowbw_kbps;
|
||||
unsigned int sample_ms;
|
||||
unsigned int max_bw_kbps;
|
||||
unsigned int min_bw_kbps;
|
||||
unsigned int target_kbps;
|
||||
unsigned int current_kbps;
|
||||
};
|
||||
|
||||
static void bwmon_clear_counters(struct icc_bwmon *bwmon)
|
||||
{
|
||||
/*
|
||||
* Clear counters. The order and barriers are
|
||||
* important. Quoting downstream Qualcomm msm-4.9 tree:
|
||||
*
|
||||
* The counter clear and IRQ clear bits are not in the same 4KB
|
||||
* region. So, we need to make sure the counter clear is completed
|
||||
* before we try to clear the IRQ or do any other counter operations.
|
||||
*/
|
||||
writel(BWMON_CLEAR_CLEAR, bwmon->base + BWMON_CLEAR);
|
||||
}
|
||||
|
||||
static void bwmon_clear_irq(struct icc_bwmon *bwmon)
|
||||
{
|
||||
/*
|
||||
* Clear zone and global interrupts. The order and barriers are
|
||||
* important. Quoting downstream Qualcomm msm-4.9 tree:
|
||||
*
|
||||
* Synchronize the local interrupt clear in mon_irq_clear()
|
||||
* with the global interrupt clear here. Otherwise, the CPU
|
||||
* may reorder the two writes and clear the global interrupt
|
||||
* before the local interrupt, causing the global interrupt
|
||||
* to be retriggered by the local interrupt still being high.
|
||||
*
|
||||
* Similarly, because the global registers are in a different
|
||||
* region than the local registers, we need to ensure any register
|
||||
* writes to enable the monitor after this call are ordered with the
|
||||
* clearing here so that local writes don't happen before the
|
||||
* interrupt is cleared.
|
||||
*/
|
||||
writel(BWMON_IRQ_ENABLE_MASK, bwmon->base + BWMON_IRQ_CLEAR);
|
||||
writel(BIT(0), bwmon->base + BWMON_GLOBAL_IRQ_CLEAR);
|
||||
}
|
||||
|
||||
static void bwmon_disable(struct icc_bwmon *bwmon)
|
||||
{
|
||||
/* Disable interrupts. Strict ordering, see bwmon_clear_irq(). */
|
||||
writel(0x0, bwmon->base + BWMON_GLOBAL_IRQ_ENABLE);
|
||||
writel(0x0, bwmon->base + BWMON_IRQ_ENABLE);
|
||||
|
||||
/*
|
||||
* Disable bwmon. Must happen before bwmon_clear_irq() to avoid spurious
|
||||
* IRQ.
|
||||
*/
|
||||
writel(0x0, bwmon->base + BWMON_ENABLE);
|
||||
}
|
||||
|
||||
static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable)
|
||||
{
|
||||
/* Enable interrupts */
|
||||
writel(BWMON_GLOBAL_IRQ_ENABLE_ENABLE,
|
||||
bwmon->base + BWMON_GLOBAL_IRQ_ENABLE);
|
||||
writel(irq_enable, bwmon->base + BWMON_IRQ_ENABLE);
|
||||
|
||||
/* Enable bwmon */
|
||||
writel(BWMON_ENABLE_ENABLE, bwmon->base + BWMON_ENABLE);
|
||||
}
|
||||
|
||||
static unsigned int bwmon_kbps_to_count(unsigned int kbps)
|
||||
{
|
||||
return kbps / BWMON_COUNT_UNIT_KB;
|
||||
}
|
||||
|
||||
static void bwmon_set_threshold(struct icc_bwmon *bwmon, unsigned int reg,
|
||||
unsigned int kbps)
|
||||
{
|
||||
unsigned int thres;
|
||||
|
||||
thres = mult_frac(bwmon_kbps_to_count(kbps), bwmon->sample_ms,
|
||||
MSEC_PER_SEC);
|
||||
writel_relaxed(thres, bwmon->base + reg);
|
||||
}
|
||||
|
||||
static void bwmon_start(struct icc_bwmon *bwmon,
|
||||
const struct icc_bwmon_data *data)
|
||||
{
|
||||
unsigned int thres_count;
|
||||
int window;
|
||||
|
||||
bwmon_clear_counters(bwmon);
|
||||
|
||||
window = mult_frac(bwmon->sample_ms, HW_TIMER_HZ, MSEC_PER_SEC);
|
||||
/* Maximum sampling window: 0xfffff */
|
||||
writel_relaxed(window, bwmon->base + BWMON_SAMPLE_WINDOW);
|
||||
|
||||
bwmon_set_threshold(bwmon, BWMON_THRESHOLD_HIGH,
|
||||
data->default_highbw_kbps);
|
||||
bwmon_set_threshold(bwmon, BWMON_THRESHOLD_MED,
|
||||
data->default_medbw_kbps);
|
||||
bwmon_set_threshold(bwmon, BWMON_THRESHOLD_LOW,
|
||||
data->default_lowbw_kbps);
|
||||
|
||||
thres_count = data->zone3_thres_count << BWMON_THRESHOLD_COUNT_ZONE3_SHIFT |
|
||||
BWMON_THRESHOLD_COUNT_ZONE2_DEFAULT << BWMON_THRESHOLD_COUNT_ZONE2_SHIFT |
|
||||
data->zone1_thres_count << BWMON_THRESHOLD_COUNT_ZONE1_SHIFT |
|
||||
BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT;
|
||||
writel_relaxed(thres_count, bwmon->base + BWMON_THRESHOLD_COUNT);
|
||||
writel_relaxed(BWMON_ZONE_ACTIONS_DEFAULT,
|
||||
bwmon->base + BWMON_ZONE_ACTIONS);
|
||||
/* Write barriers in bwmon_clear_irq() */
|
||||
|
||||
bwmon_clear_irq(bwmon);
|
||||
bwmon_enable(bwmon, BWMON_IRQ_ENABLE_MASK);
|
||||
}
|
||||
|
||||
static irqreturn_t bwmon_intr(int irq, void *dev_id)
|
||||
{
|
||||
struct icc_bwmon *bwmon = dev_id;
|
||||
unsigned int status, max;
|
||||
int zone;
|
||||
|
||||
status = readl(bwmon->base + BWMON_IRQ_STATUS);
|
||||
status &= BWMON_IRQ_ENABLE_MASK;
|
||||
if (!status) {
|
||||
/*
|
||||
* Only zone 1 and zone 3 interrupts are enabled but zone 2
|
||||
* threshold could be hit and trigger interrupt even if not
|
||||
* enabled.
|
||||
* Such spurious interrupt might come with valuable max count or
|
||||
* not, so solution would be to always check all
|
||||
* BWMON_ZONE_MAX() registers to find the highest value.
|
||||
* Such case is currently ignored.
|
||||
*/
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
bwmon_disable(bwmon);
|
||||
|
||||
zone = get_bitmask_order(status >> BWMON_IRQ_STATUS_ZONE_SHIFT) - 1;
|
||||
/*
|
||||
* Zone max bytes count register returns count units within sampling
|
||||
* window. Downstream kernel for BWMONv4 (called BWMON type 2 in
|
||||
* downstream) always increments the max bytes count by one.
|
||||
*/
|
||||
max = readl(bwmon->base + BWMON_ZONE_MAX(zone)) + 1;
|
||||
max *= BWMON_COUNT_UNIT_KB;
|
||||
bwmon->target_kbps = mult_frac(max, MSEC_PER_SEC, bwmon->sample_ms);
|
||||
|
||||
return IRQ_WAKE_THREAD;
|
||||
}
|
||||
|
||||
static irqreturn_t bwmon_intr_thread(int irq, void *dev_id)
|
||||
{
|
||||
struct icc_bwmon *bwmon = dev_id;
|
||||
unsigned int irq_enable = 0;
|
||||
struct dev_pm_opp *opp, *target_opp;
|
||||
unsigned int bw_kbps, up_kbps, down_kbps;
|
||||
|
||||
bw_kbps = bwmon->target_kbps;
|
||||
|
||||
target_opp = dev_pm_opp_find_bw_ceil(bwmon->dev, &bw_kbps, 0);
|
||||
if (IS_ERR(target_opp) && PTR_ERR(target_opp) == -ERANGE)
|
||||
target_opp = dev_pm_opp_find_bw_floor(bwmon->dev, &bw_kbps, 0);
|
||||
|
||||
bwmon->target_kbps = bw_kbps;
|
||||
|
||||
bw_kbps--;
|
||||
opp = dev_pm_opp_find_bw_floor(bwmon->dev, &bw_kbps, 0);
|
||||
if (IS_ERR(opp) && PTR_ERR(opp) == -ERANGE)
|
||||
down_kbps = bwmon->target_kbps;
|
||||
else
|
||||
down_kbps = bw_kbps;
|
||||
|
||||
up_kbps = bwmon->target_kbps + 1;
|
||||
|
||||
if (bwmon->target_kbps >= bwmon->max_bw_kbps)
|
||||
irq_enable = BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT);
|
||||
else if (bwmon->target_kbps <= bwmon->min_bw_kbps)
|
||||
irq_enable = BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT);
|
||||
else
|
||||
irq_enable = BWMON_IRQ_ENABLE_MASK;
|
||||
|
||||
bwmon_set_threshold(bwmon, BWMON_THRESHOLD_HIGH, up_kbps);
|
||||
bwmon_set_threshold(bwmon, BWMON_THRESHOLD_MED, down_kbps);
|
||||
/* Write barriers in bwmon_clear_counters() */
|
||||
bwmon_clear_counters(bwmon);
|
||||
bwmon_clear_irq(bwmon);
|
||||
bwmon_enable(bwmon, irq_enable);
|
||||
|
||||
if (bwmon->target_kbps == bwmon->current_kbps)
|
||||
goto out;
|
||||
|
||||
dev_pm_opp_set_opp(bwmon->dev, target_opp);
|
||||
bwmon->current_kbps = bwmon->target_kbps;
|
||||
|
||||
out:
|
||||
dev_pm_opp_put(target_opp);
|
||||
if (!IS_ERR(opp))
|
||||
dev_pm_opp_put(opp);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int bwmon_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct dev_pm_opp *opp;
|
||||
struct icc_bwmon *bwmon;
|
||||
const struct icc_bwmon_data *data;
|
||||
int ret;
|
||||
|
||||
bwmon = devm_kzalloc(dev, sizeof(*bwmon), GFP_KERNEL);
|
||||
if (!bwmon)
|
||||
return -ENOMEM;
|
||||
|
||||
data = of_device_get_match_data(dev);
|
||||
|
||||
bwmon->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(bwmon->base)) {
|
||||
dev_err(dev, "failed to map bwmon registers\n");
|
||||
return PTR_ERR(bwmon->base);
|
||||
}
|
||||
|
||||
bwmon->irq = platform_get_irq(pdev, 0);
|
||||
if (bwmon->irq < 0) {
|
||||
dev_err(dev, "failed to acquire bwmon IRQ\n");
|
||||
return bwmon->irq;
|
||||
}
|
||||
|
||||
ret = devm_pm_opp_of_add_table(dev);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "failed to add OPP table\n");
|
||||
|
||||
bwmon->max_bw_kbps = UINT_MAX;
|
||||
opp = dev_pm_opp_find_bw_floor(dev, &bwmon->max_bw_kbps, 0);
|
||||
if (IS_ERR(opp))
|
||||
return dev_err_probe(dev, ret, "failed to find max peak bandwidth\n");
|
||||
|
||||
bwmon->min_bw_kbps = 0;
|
||||
opp = dev_pm_opp_find_bw_ceil(dev, &bwmon->min_bw_kbps, 0);
|
||||
if (IS_ERR(opp))
|
||||
return dev_err_probe(dev, ret, "failed to find min peak bandwidth\n");
|
||||
|
||||
bwmon->sample_ms = data->sample_ms;
|
||||
bwmon->default_lowbw_kbps = data->default_lowbw_kbps;
|
||||
bwmon->dev = dev;
|
||||
|
||||
bwmon_disable(bwmon);
|
||||
ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr,
|
||||
bwmon_intr_thread,
|
||||
IRQF_ONESHOT, dev_name(dev), bwmon);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "failed to request IRQ\n");
|
||||
|
||||
platform_set_drvdata(pdev, bwmon);
|
||||
bwmon_start(bwmon, data);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bwmon_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct icc_bwmon *bwmon = platform_get_drvdata(pdev);
|
||||
|
||||
bwmon_disable(bwmon);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* BWMON v4 */
|
||||
static const struct icc_bwmon_data msm8998_bwmon_data = {
|
||||
.sample_ms = 4,
|
||||
.default_highbw_kbps = 4800 * 1024, /* 4.8 GBps */
|
||||
.default_medbw_kbps = 512 * 1024, /* 512 MBps */
|
||||
.default_lowbw_kbps = 0,
|
||||
.zone1_thres_count = 16,
|
||||
.zone3_thres_count = 1,
|
||||
};
|
||||
|
||||
static const struct of_device_id bwmon_of_match[] = {
|
||||
{ .compatible = "qcom,msm8998-bwmon", .data = &msm8998_bwmon_data },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, bwmon_of_match);
|
||||
|
||||
static struct platform_driver bwmon_driver = {
|
||||
.probe = bwmon_probe,
|
||||
.remove = bwmon_remove,
|
||||
.driver = {
|
||||
.name = "qcom-bwmon",
|
||||
.of_match_table = bwmon_of_match,
|
||||
},
|
||||
};
|
||||
module_platform_driver(bwmon_driver);
|
||||
|
||||
MODULE_AUTHOR("Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>");
|
||||
MODULE_DESCRIPTION("QCOM BWMON driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
@ -382,7 +382,7 @@ static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
|
||||
* llcc_slice_getd - get llcc slice descriptor
|
||||
* @uid: usecase_id for the client
|
||||
*
|
||||
* A pointer to llcc slice descriptor will be returned on success and
|
||||
* A pointer to llcc slice descriptor will be returned on success
|
||||
* and error pointer is returned on failure
|
||||
*/
|
||||
struct llcc_slice_desc *llcc_slice_getd(u32 uid)
|
||||
|
||||
@ -108,6 +108,8 @@ EXPORT_SYMBOL_GPL(qcom_mdt_get_size);
|
||||
* qcom_mdt_read_metadata() - read header and metadata from mdt or mbn
|
||||
* @fw: firmware of mdt header or mbn
|
||||
* @data_len: length of the read metadata blob
|
||||
* @fw_name: name of the firmware, for construction of segment file names
|
||||
* @dev: device handle to associate resources with
|
||||
*
|
||||
* The mechanism that performs the authentication of the loading firmware
|
||||
* expects an ELF header directly followed by the segment of hashes, with no
|
||||
@ -192,7 +194,7 @@ EXPORT_SYMBOL_GPL(qcom_mdt_read_metadata);
|
||||
* qcom_mdt_pas_init() - initialize PAS region for firmware loading
|
||||
* @dev: device handle to associate resources with
|
||||
* @fw: firmware object for the mdt file
|
||||
* @firmware: name of the firmware, for construction of segment file names
|
||||
* @fw_name: name of the firmware, for construction of segment file names
|
||||
* @pas_id: PAS identifier
|
||||
* @mem_phys: physical address of allocated memory region
|
||||
* @ctx: PAS metadata context, to be released by caller
|
||||
|
||||
@ -194,14 +194,17 @@ struct ocmem *of_get_ocmem(struct device *dev)
|
||||
devnode = of_parse_phandle(dev->of_node, "sram", 0);
|
||||
if (!devnode || !devnode->parent) {
|
||||
dev_err(dev, "Cannot look up sram phandle\n");
|
||||
of_node_put(devnode);
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(devnode->parent);
|
||||
if (!pdev) {
|
||||
dev_err(dev, "Cannot find device node %s\n", devnode->name);
|
||||
of_node_put(devnode);
|
||||
return ERR_PTR(-EPROBE_DEFER);
|
||||
}
|
||||
of_node_put(devnode);
|
||||
|
||||
ocmem = platform_get_drvdata(pdev);
|
||||
if (!ocmem) {
|
||||
|
||||
@ -399,8 +399,10 @@ static int qmp_cooling_devices_register(struct qmp *qmp)
|
||||
continue;
|
||||
ret = qmp_cooling_device_add(qmp, &qmp->cooling_devs[count++],
|
||||
child);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
of_node_put(child);
|
||||
goto unroll;
|
||||
}
|
||||
}
|
||||
|
||||
if (!count)
|
||||
|
||||
@ -23,8 +23,8 @@
|
||||
/**
|
||||
* struct rpmhpd - top level RPMh power domain resource data structure
|
||||
* @dev: rpmh power domain controller device
|
||||
* @pd: generic_pm_domain corrresponding to the power domain
|
||||
* @parent: generic_pm_domain corrresponding to the parent's power domain
|
||||
* @pd: generic_pm_domain corresponding to the power domain
|
||||
* @parent: generic_pm_domain corresponding to the parent's power domain
|
||||
* @peer: A peer power domain in case Active only Voting is
|
||||
* supported
|
||||
* @active_only: True if it represents an Active only peer
|
||||
|
||||
@ -119,6 +119,9 @@ struct smp2p_entry {
|
||||
* @out: pointer to the outbound smem item
|
||||
* @smem_items: ids of the two smem items
|
||||
* @valid_entries: already scanned inbound entries
|
||||
* @ssr_ack_enabled: SMP2P_FEATURE_SSR_ACK feature is supported and was enabled
|
||||
* @ssr_ack: current cached state of the local ack bit
|
||||
* @negotiation_done: whether negotiating finished
|
||||
* @local_pid: processor id of the inbound edge
|
||||
* @remote_pid: processor id of the outbound edge
|
||||
* @ipc_regmap: regmap for the outbound ipc
|
||||
|
||||
@ -332,6 +332,7 @@ static const struct soc_id soc_id[] = {
|
||||
{ 480, "SM8450" },
|
||||
{ 482, "SM8450" },
|
||||
{ 487, "SC7280" },
|
||||
{ 495, "SC7180P" },
|
||||
};
|
||||
|
||||
static const char *socinfo_machine(struct device *dev, unsigned int id)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user