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arm64: dts: renesas: Add LIF channel indices to vsps properties

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According to the Renesas R-Car DU bindings documentation, the 'vsps'
property should be composed of a phandle to the VSP instance and the
index of the LIF channel assigned to the DU channel. Some SoC device
tree source files do not specify any LIF channel index, relying on the
driver defaulting to 0 if not specified.

Align all device tree files by specifying the LIF channel indices as
prescribed by the bindings documentation.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20190825140135.12150-2-jacopo+renesas@jmondi.org/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Jacopo Mondi 2019-08-25 16:01:34 +02:00 committed by Geert Uytterhoeven
parent 54ce17dd40
commit 3c19b46a1f
5 changed files with 5 additions and 5 deletions
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2
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
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@ -2651,7 +2651,7 @@
clock-names = "du.0", "du.1", "du.2";
status = "disabled";
vsps = <&vspd0 &vspd1 &vspd2>;
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
ports {
#address-cells = <1>;

2
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
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@ -30,7 +30,7 @@
};
&du {
vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>;
};
&fcpvb1 {

2
arch/arm64/boot/dts/renesas/r8a7796.dtsi
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@ -2765,7 +2765,7 @@
clock-names = "du.0", "du.1", "du.2";
status = "disabled";
vsps = <&vspd0 &vspd1 &vspd2>;
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
ports {
#address-cells = <1>;

2
arch/arm64/boot/dts/renesas/r8a77970.dtsi
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@ -1120,7 +1120,7 @@
clock-names = "du.0";
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
resets = <&cpg 724>;
vsps = <&vspd0>;
vsps = <&vspd0 0>;
status = "disabled";
ports {

2
arch/arm64/boot/dts/renesas/r8a77980.dtsi
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@ -1495,7 +1495,7 @@
clock-names = "du.0";
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 724>;
vsps = <&vspd0>;
vsps = <&vspd0 0>;
status = "disabled";
ports {