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ARM: imx: convert audmux to a platform driver
It coverts audmux to a platform driver, so that it can be moved into sound/soc/imx and adopt device tree support later. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
parent
2405fc9728
commit
3bc34a6143
@ -75,6 +75,10 @@ void __init mx21_init_irq(void)
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mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
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mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
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}
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}
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static const struct resource imx21_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K),
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};
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void __init imx21_soc_init(void)
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void __init imx21_soc_init(void)
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{
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{
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mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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@ -85,4 +89,6 @@ void __init imx21_soc_init(void)
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mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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imx_add_imx_dma();
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imx_add_imx_dma();
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platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
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ARRAY_SIZE(imx21_audmux_res));
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}
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}
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@ -83,6 +83,10 @@ static struct sdma_platform_data imx25_sdma_pdata __initdata = {
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.script_addrs = &imx25_sdma_script,
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.script_addrs = &imx25_sdma_script,
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};
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};
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static const struct resource imx25_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX25_AUDMUX_BASE_ADDR, SZ_16K),
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};
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void __init imx25_soc_init(void)
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void __init imx25_soc_init(void)
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{
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{
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/* i.mx25 has the i.mx31 type gpio */
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/* i.mx25 has the i.mx31 type gpio */
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@ -93,4 +97,7 @@ void __init imx25_soc_init(void)
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/* i.mx25 has the i.mx35 type sdma */
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/* i.mx25 has the i.mx35 type sdma */
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imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
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imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
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/* i.mx25 has the i.mx31 type audmux */
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platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res,
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ARRAY_SIZE(imx25_audmux_res));
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}
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}
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@ -75,6 +75,10 @@ void __init mx27_init_irq(void)
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mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
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mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
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}
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}
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static const struct resource imx27_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K),
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};
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void __init imx27_soc_init(void)
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void __init imx27_soc_init(void)
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{
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{
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/* i.mx27 has the i.mx21 type gpio */
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/* i.mx27 has the i.mx21 type gpio */
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@ -86,4 +90,7 @@ void __init imx27_soc_init(void)
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mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
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imx_add_imx_dma();
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imx_add_imx_dma();
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/* imx27 has the imx21 type audmux */
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platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
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ARRAY_SIZE(imx27_audmux_res));
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}
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}
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@ -158,6 +158,10 @@ static struct sdma_platform_data imx31_sdma_pdata __initdata = {
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.script_addrs = &imx31_to2_sdma_script,
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.script_addrs = &imx31_to2_sdma_script,
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};
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};
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static const struct resource imx31_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K),
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};
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void __init imx31_soc_init(void)
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void __init imx31_soc_init(void)
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{
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{
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int to_version = mx31_revision() >> 4;
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int to_version = mx31_revision() >> 4;
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@ -175,6 +179,8 @@ void __init imx31_soc_init(void)
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}
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}
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imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
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imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
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platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res,
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ARRAY_SIZE(imx31_audmux_res));
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}
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}
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#endif /* ifdef CONFIG_SOC_IMX31 */
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#endif /* ifdef CONFIG_SOC_IMX31 */
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@ -241,6 +247,10 @@ static struct sdma_platform_data imx35_sdma_pdata __initdata = {
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.script_addrs = &imx35_to2_sdma_script,
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.script_addrs = &imx35_to2_sdma_script,
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};
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};
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static const struct resource imx35_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K),
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};
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void __init imx35_soc_init(void)
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void __init imx35_soc_init(void)
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{
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{
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int to_version = mx35_revision() >> 4;
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int to_version = mx35_revision() >> 4;
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@ -259,5 +269,8 @@ void __init imx35_soc_init(void)
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}
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}
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imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
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imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
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/* i.mx35 has the i.mx31 type audmux */
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platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res,
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ARRAY_SIZE(imx35_audmux_res));
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}
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}
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#endif /* ifdef CONFIG_SOC_IMX35 */
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#endif /* ifdef CONFIG_SOC_IMX35 */
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@ -170,6 +170,18 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
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.script_addrs = &imx53_sdma_script,
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.script_addrs = &imx53_sdma_script,
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};
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};
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static const struct resource imx50_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K),
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};
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static const struct resource imx51_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K),
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};
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static const struct resource imx53_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX53_AUDMUX_BASE_ADDR, SZ_16K),
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};
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void __init imx50_soc_init(void)
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void __init imx50_soc_init(void)
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{
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{
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/* i.mx50 has the i.mx31 type gpio */
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/* i.mx50 has the i.mx31 type gpio */
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@ -179,6 +191,10 @@ void __init imx50_soc_init(void)
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mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
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mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
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mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
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mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
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mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
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mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
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/* i.mx50 has the i.mx31 type audmux */
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platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
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ARRAY_SIZE(imx50_audmux_res));
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}
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}
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void __init imx51_soc_init(void)
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void __init imx51_soc_init(void)
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@ -191,6 +207,9 @@ void __init imx51_soc_init(void)
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/* i.mx51 has the i.mx35 type sdma */
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/* i.mx51 has the i.mx35 type sdma */
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imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
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imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
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/* i.mx51 has the i.mx31 type audmux */
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platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res,
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ARRAY_SIZE(imx51_audmux_res));
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}
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}
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void __init imx53_soc_init(void)
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void __init imx53_soc_init(void)
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@ -206,4 +225,7 @@ void __init imx53_soc_init(void)
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/* i.mx53 has the i.mx35 type sdma */
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/* i.mx53 has the i.mx35 type sdma */
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imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
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imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
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/* i.mx53 has the i.mx31 type audmux */
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platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res,
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ARRAY_SIZE(imx53_audmux_res));
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}
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}
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@ -1,4 +1,6 @@
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/*
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2012 Linaro Ltd.
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* Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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* Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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*
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*
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* Initial development of this code was funded by
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* Initial development of this code was funded by
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@ -15,14 +17,16 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/debugfs.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <mach/audmux.h>
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#include <mach/audmux.h>
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#include <mach/hardware.h>
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#define DRIVER_NAME "imx-audmux"
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static struct clk *audmux_clk;
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static struct clk *audmux_clk;
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static void __iomem *audmux_base;
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static void __iomem *audmux_base;
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@ -140,7 +144,7 @@ static const struct file_operations audmux_debugfs_fops = {
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.llseek = default_llseek,
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.llseek = default_llseek,
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};
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};
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static void audmux_debugfs_init(void)
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static void __init audmux_debugfs_init(void)
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{
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{
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int i;
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int i;
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char buf[20];
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char buf[20];
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@ -159,18 +163,48 @@ static void audmux_debugfs_init(void)
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i);
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i);
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}
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}
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}
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}
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static void __exit audmux_debugfs_remove(void)
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{
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debugfs_remove_recursive(audmux_debugfs_root);
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}
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#else
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#else
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static inline void audmux_debugfs_init(void)
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static inline void audmux_debugfs_init(void)
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{
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{
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}
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}
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static inline void audmux_debugfs_remove(void)
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{
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}
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#endif
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#endif
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enum imx_audmux_type {
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IMX21_AUDMUX,
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IMX31_AUDMUX,
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} audmux_type;
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static struct platform_device_id imx_audmux_ids[] = {
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{
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.name = "imx21-audmux",
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.driver_data = IMX21_AUDMUX,
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}, {
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.name = "imx31-audmux",
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.driver_data = IMX31_AUDMUX,
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}, {
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/* sentinel */
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}
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};
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MODULE_DEVICE_TABLE(platform, imx_audmux_ids);
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static const uint8_t port_mapping[] = {
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static const uint8_t port_mapping[] = {
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0x0, 0x4, 0x8, 0x10, 0x14, 0x1c,
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0x0, 0x4, 0x8, 0x10, 0x14, 0x1c,
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};
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};
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int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
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int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
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{
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{
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if (audmux_type != IMX21_AUDMUX)
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return -EINVAL;
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if (!audmux_base)
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if (!audmux_base)
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return -ENOSYS;
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return -ENOSYS;
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@ -186,6 +220,9 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
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int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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unsigned int pdcr)
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unsigned int pdcr)
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{
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{
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if (audmux_type != IMX31_AUDMUX)
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return -EINVAL;
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if (!audmux_base)
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if (!audmux_base)
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return -ENOSYS;
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return -ENOSYS;
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@ -202,41 +239,61 @@ int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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}
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}
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EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port);
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EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port);
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static int mxc_audmux_init(void)
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static int __init imx_audmux_probe(struct platform_device *pdev)
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{
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{
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int ret;
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struct resource *res;
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if (cpu_is_mx51()) {
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audmux_base = MX51_IO_ADDRESS(MX51_AUDMUX_BASE_ADDR);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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} else if (cpu_is_mx31()) {
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audmux_base = devm_request_and_ioremap(&pdev->dev, res);
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audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR);
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if (!audmux_base)
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} else if (cpu_is_mx35()) {
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return -EADDRNOTAVAIL;
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audmux_clk = clk_get(NULL, "audmux");
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if (IS_ERR(audmux_clk)) {
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audmux_clk = clk_get(&pdev->dev, "audmux");
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ret = PTR_ERR(audmux_clk);
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if (IS_ERR(audmux_clk)) {
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printk(KERN_ERR "%s: cannot get clock: %d\n", __func__,
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dev_dbg(&pdev->dev, "cannot get clock: %ld\n",
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ret);
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PTR_ERR(audmux_clk));
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return ret;
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audmux_clk = NULL;
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}
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audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR);
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} else if (cpu_is_mx25()) {
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audmux_clk = clk_get(NULL, "audmux");
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if (IS_ERR(audmux_clk)) {
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ret = PTR_ERR(audmux_clk);
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printk(KERN_ERR "%s: cannot get clock: %d\n", __func__,
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ret);
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return ret;
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}
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||||||
audmux_base = MX25_IO_ADDRESS(MX25_AUDMUX_BASE_ADDR);
|
|
||||||
} else if (cpu_is_mx27()) {
|
|
||||||
audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR);
|
|
||||||
} else if (cpu_is_mx21()) {
|
|
||||||
audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!cpu_is_mx2())
|
audmux_type = pdev->id_entry->driver_data;
|
||||||
|
if (audmux_type == IMX31_AUDMUX)
|
||||||
audmux_debugfs_init();
|
audmux_debugfs_init();
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
postcore_initcall(mxc_audmux_init);
|
static int __exit imx_audmux_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
if (audmux_type == IMX31_AUDMUX)
|
||||||
|
audmux_debugfs_remove();
|
||||||
|
clk_put(audmux_clk);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct platform_driver imx_audmux_driver = {
|
||||||
|
.probe = imx_audmux_probe,
|
||||||
|
.remove = __exit_p(imx_audmux_remove),
|
||||||
|
.id_table = imx_audmux_ids,
|
||||||
|
.driver = {
|
||||||
|
.name = DRIVER_NAME,
|
||||||
|
.owner = THIS_MODULE,
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
static int __init imx_audmux_init(void)
|
||||||
|
{
|
||||||
|
return platform_driver_register(&imx_audmux_driver);
|
||||||
|
}
|
||||||
|
subsys_initcall(imx_audmux_init);
|
||||||
|
|
||||||
|
static void __exit imx_audmux_exit(void)
|
||||||
|
{
|
||||||
|
platform_driver_unregister(&imx_audmux_driver);
|
||||||
|
}
|
||||||
|
module_exit(imx_audmux_exit);
|
||||||
|
|
||||||
|
MODULE_DESCRIPTION("Freescale i.MX AUDMUX driver");
|
||||||
|
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
|
||||||
|
MODULE_LICENSE("GPL v2");
|
||||||
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|
||||||
|
Loading…
Reference in New Issue
Block a user