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i2c: designware: slave should do WRITE_REQUESTED before WRITE_RECEIVED
Sometimes we would get the following flow when doing an i2cset: 0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x514 : INTR_STAT=0x4 I2C_SLAVE_WRITE_RECEIVED 0x1 STATUS SLAVE_ACTIVITY=0x0 : RAW_INTR_STAT=0x714 : INTR_STAT=0x204 I2C_SLAVE_WRITE_REQUESTED I2C_SLAVE_WRITE_RECEIVED Documentation/i2c/slave-interface.rst says that I2C_SLAVE_WRITE_REQUESTED, which is mandatory, should be sent while the data did not arrive yet. It means in a write-request I2C_SLAVE_WRITE_REQUESTED should be reported before any I2C_SLAVE_WRITE_RECEIVED. By the way, I2C_SLAVE_STOP didn't be reported in the above case because DW_IC_INTR_STAT was not 0x200. dev->status can be used to record the current state, especially Designware I2C controller has no interrupts to identify a write-request. This patch makes not only I2C_SLAVE_WRITE_REQUESTED been reported first when IC_INTR_RX_FULL is rising and dev->status isn't STATUS_WRITE_IN_PROGRESS but also I2C_SLAVE_STOP been reported when a STOP condition is received. Signed-off-by: Michael Wu <michael.wu@vatics.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -172,26 +172,25 @@ static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
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"%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
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enabled, slave_activity, raw_stat, stat);
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if ((stat & DW_IC_INTR_RX_FULL) && (stat & DW_IC_INTR_STOP_DET))
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i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, &val);
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if (stat & DW_IC_INTR_RX_FULL) {
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if (dev->status != STATUS_WRITE_IN_PROGRESS) {
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dev->status = STATUS_WRITE_IN_PROGRESS;
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i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED,
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&val);
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}
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regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
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val = tmp;
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if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
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&val))
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dev_vdbg(dev->dev, "Byte %X acked!", val);
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}
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if (stat & DW_IC_INTR_RD_REQ) {
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if (slave_activity) {
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if (stat & DW_IC_INTR_RX_FULL) {
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regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
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val = tmp;
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regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
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if (!i2c_slave_event(dev->slave,
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I2C_SLAVE_WRITE_RECEIVED,
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&val)) {
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dev_vdbg(dev->dev, "Byte %X acked!",
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val);
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}
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regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
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} else {
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regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
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regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &tmp);
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}
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dev->status = STATUS_READ_IN_PROGRESS;
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if (!i2c_slave_event(dev->slave,
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I2C_SLAVE_READ_REQUESTED,
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&val))
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@ -203,18 +202,10 @@ static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
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if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
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&val))
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regmap_read(dev->map, DW_IC_CLR_RX_DONE, &tmp);
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i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
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return 1;
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}
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if (stat & DW_IC_INTR_RX_FULL) {
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regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
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val = tmp;
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if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
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&val))
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dev_vdbg(dev->dev, "Byte %X acked!", val);
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} else {
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if (stat & DW_IC_INTR_STOP_DET) {
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dev->status = STATUS_IDLE;
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i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
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}
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