From 3b5a7ca7d252b96e9623b262414713828b2bd68f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= Date: Mon, 6 Jun 2022 16:57:01 +0200 Subject: [PATCH] ARM: at91: setup outer cache .write_sec() callback if needed MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When running under OP-TEE, the L2 cache is configured by OP-TEE and the sam platform code does not allow any modification yet. Setup a dummy .write_sec() callback to avoid triggering exceptions when Linux tries to modify the L2 cache configuration. Signed-off-by: Clément Léger [claudiu.beznea: keep .init_early populated only for SAMA5D2, remove sam_secure_init() from sama5d2_init() as it is also called in sama5_secure_cache_init()] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220606145701.185552-3-clement.leger@bootlin.com --- arch/arm/mach-at91/sama5.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c index de5dd28b392e..67ed68fbe3a5 100644 --- a/arch/arm/mach-at91/sama5.c +++ b/arch/arm/mach-at91/sama5.c @@ -9,13 +9,27 @@ #include #include +#include #include #include +#include #include #include "generic.h" #include "sam_secure.h" +static void sama5_l2c310_write_sec(unsigned long val, unsigned reg) +{ + /* OP-TEE configures the L2 cache and does not allow modifying it yet */ +} + +static void __init sama5_secure_cache_init(void) +{ + sam_secure_init(); + if (sam_linux_is_optee_available()) + outer_cache.write_sec = sama5_l2c310_write_sec; +} + static void __init sama5_dt_device_init(void) { of_platform_default_populate(NULL, NULL, NULL); @@ -48,7 +62,6 @@ MACHINE_END static void __init sama5d2_init(void) { of_platform_default_populate(NULL, NULL, NULL); - sam_secure_init(); sama5d2_pm_init(); } @@ -60,6 +73,7 @@ static const char *const sama5d2_compat[] __initconst = { DT_MACHINE_START(sama5d2, "Atmel SAMA5") /* Maintainer: Atmel */ .init_machine = sama5d2_init, + .init_early = sama5_secure_cache_init, .dt_compat = sama5d2_compat, .l2c_aux_mask = ~0UL, MACHINE_END