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nvmem: Add RAVE SP EEPROM driver
Add driver providing access to EEPROMs connected to RAVE SP devices Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Aleksander Morgado <aleksander@aleksander.es> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Andrey Smirnov
Greg Kroah-Hartman
parent
3905c11c1c
commit
3b51f47be1
@ -175,4 +175,10 @@ config NVMEM_SNVS_LPGPR
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This driver can also be built as a module. If so, the module
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will be called nvmem-snvs-lpgpr.
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config RAVE_SP_EEPROM
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tristate "Rave SP EEPROM Support"
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depends on RAVE_SP_CORE
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help
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Say y here to enable Rave SP EEPROM support.
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endif
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@ -37,3 +37,6 @@ obj-$(CONFIG_MESON_MX_EFUSE) += nvmem_meson_mx_efuse.o
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nvmem_meson_mx_efuse-y := meson-mx-efuse.o
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obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o
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nvmem_snvs_lpgpr-y := snvs_lpgpr.o
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obj-$(CONFIG_RAVE_SP_EEPROM) += nvmem-rave-sp-eeprom.o
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nvmem-rave-sp-eeprom-y := rave-sp-eeprom.o
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357
drivers/nvmem/rave-sp-eeprom.c
Normal file
357
drivers/nvmem/rave-sp-eeprom.c
Normal file
@ -0,0 +1,357 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* EEPROM driver for RAVE SP
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*
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* Copyright (C) 2018 Zodiac Inflight Innovations
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*
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*/
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#include <linux/kernel.h>
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#include <linux/mfd/rave-sp.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/sizes.h>
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/**
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* enum rave_sp_eeprom_access_type - Supported types of EEPROM access
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*
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* @RAVE_SP_EEPROM_WRITE: EEPROM write
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* @RAVE_SP_EEPROM_READ: EEPROM read
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*/
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enum rave_sp_eeprom_access_type {
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RAVE_SP_EEPROM_WRITE = 0,
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RAVE_SP_EEPROM_READ = 1,
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};
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/**
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* enum rave_sp_eeprom_header_size - EEPROM command header sizes
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*
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* @RAVE_SP_EEPROM_HEADER_SMALL: EEPROM header size for "small" devices (< 8K)
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* @RAVE_SP_EEPROM_HEADER_BIG: EEPROM header size for "big" devices (> 8K)
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*/
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enum rave_sp_eeprom_header_size {
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RAVE_SP_EEPROM_HEADER_SMALL = 4U,
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RAVE_SP_EEPROM_HEADER_BIG = 5U,
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};
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#define RAVE_SP_EEPROM_PAGE_SIZE 32U
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/**
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* struct rave_sp_eeprom_page - RAVE SP EEPROM page
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*
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* @type: Access type (see enum rave_sp_eeprom_access_type)
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* @success: Success flag (Success = 1, Failure = 0)
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* @data: Read data
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* Note this structure corresponds to RSP_*_EEPROM payload from RAVE
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* SP ICD
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*/
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struct rave_sp_eeprom_page {
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u8 type;
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u8 success;
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u8 data[RAVE_SP_EEPROM_PAGE_SIZE];
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} __packed;
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/**
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* struct rave_sp_eeprom - RAVE SP EEPROM device
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*
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* @sp: Pointer to parent RAVE SP device
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* @mutex: Lock protecting access to EEPROM
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* @address: EEPROM device address
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* @header_size: Size of EEPROM command header for this device
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* @dev: Pointer to corresponding struct device used for logging
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*/
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struct rave_sp_eeprom {
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struct rave_sp *sp;
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struct mutex mutex;
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u8 address;
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unsigned int header_size;
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struct device *dev;
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};
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/**
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* rave_sp_eeprom_io - Low-level part of EEPROM page access
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*
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* @eeprom: EEPROM device to write to
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* @type: EEPROM access type (read or write)
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* @idx: number of the EEPROM page
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* @page: Data to write or buffer to store result (via page->data)
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*
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* This function does all of the low-level work required to perform a
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* EEPROM access. This includes formatting correct command payload,
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* sending it and checking received results.
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*
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* Returns zero in case of success or negative error code in
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* case of failure.
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*/
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static int rave_sp_eeprom_io(struct rave_sp_eeprom *eeprom,
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enum rave_sp_eeprom_access_type type,
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u16 idx,
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struct rave_sp_eeprom_page *page)
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{
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const bool is_write = type == RAVE_SP_EEPROM_WRITE;
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const unsigned int data_size = is_write ? sizeof(page->data) : 0;
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const unsigned int cmd_size = eeprom->header_size + data_size;
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const unsigned int rsp_size =
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is_write ? sizeof(*page) - sizeof(page->data) : sizeof(*page);
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unsigned int offset = 0;
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u8 cmd[cmd_size];
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int ret;
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cmd[offset++] = eeprom->address;
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cmd[offset++] = 0;
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cmd[offset++] = type;
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cmd[offset++] = idx;
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/*
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* If there's still room in this command's header it means we
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* are talkin to EEPROM that uses 16-bit page numbers and we
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* have to specify index's MSB in payload as well.
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*/
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if (offset < eeprom->header_size)
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cmd[offset++] = idx >> 8;
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/*
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* Copy our data to write to command buffer first. In case of
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* a read data_size should be zero and memcpy would become a
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* no-op
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*/
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memcpy(&cmd[offset], page->data, data_size);
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ret = rave_sp_exec(eeprom->sp, cmd, cmd_size, page, rsp_size);
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if (ret)
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return ret;
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if (page->type != type)
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return -EPROTO;
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if (!page->success)
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return -EIO;
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return 0;
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}
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/**
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* rave_sp_eeprom_page_access - Access single EEPROM page
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*
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* @eeprom: EEPROM device to access
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* @type: Access type to perform (read or write)
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* @offset: Offset within EEPROM to access
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* @data: Data buffer
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* @data_len: Size of the data buffer
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*
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* This function performs a generic access to a single page or a
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* portion thereof. Requested access MUST NOT cross the EEPROM page
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* boundary.
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*
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* Returns zero in case of success or negative error code in
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* case of failure.
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*/
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static int
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rave_sp_eeprom_page_access(struct rave_sp_eeprom *eeprom,
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enum rave_sp_eeprom_access_type type,
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unsigned int offset, u8 *data,
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size_t data_len)
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{
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const unsigned int page_offset = offset % RAVE_SP_EEPROM_PAGE_SIZE;
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const unsigned int page_nr = offset / RAVE_SP_EEPROM_PAGE_SIZE;
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struct rave_sp_eeprom_page page;
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int ret;
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/*
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* This function will not work if data access we've been asked
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* to do is crossing EEPROM page boundary. Normally this
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* should never happen and getting here would indicate a bug
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* in the code.
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*/
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if (WARN_ON(data_len > sizeof(page.data) - page_offset))
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return -EINVAL;
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if (type == RAVE_SP_EEPROM_WRITE) {
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/*
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* If doing a partial write we need to do a read first
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* to fill the rest of the page with correct data.
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*/
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if (data_len < RAVE_SP_EEPROM_PAGE_SIZE) {
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ret = rave_sp_eeprom_io(eeprom, RAVE_SP_EEPROM_READ,
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page_nr, &page);
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if (ret)
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return ret;
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}
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memcpy(&page.data[page_offset], data, data_len);
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}
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ret = rave_sp_eeprom_io(eeprom, type, page_nr, &page);
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if (ret)
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return ret;
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/*
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* Since we receive the result of the read via 'page.data'
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* buffer we need to copy that to 'data'
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*/
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if (type == RAVE_SP_EEPROM_READ)
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memcpy(data, &page.data[page_offset], data_len);
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return 0;
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}
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/**
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* rave_sp_eeprom_access - Access EEPROM data
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*
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* @eeprom: EEPROM device to access
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* @type: Access type to perform (read or write)
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* @offset: Offset within EEPROM to access
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* @data: Data buffer
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* @data_len: Size of the data buffer
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*
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* This function performs a generic access (either read or write) at
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* arbitrary offset (not necessary page aligned) of arbitrary length
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* (is not constrained by EEPROM page size).
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*
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* Returns zero in case of success or negative error code in case of
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* failure.
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*/
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static int rave_sp_eeprom_access(struct rave_sp_eeprom *eeprom,
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enum rave_sp_eeprom_access_type type,
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unsigned int offset, u8 *data,
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unsigned int data_len)
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{
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unsigned int residue;
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unsigned int chunk;
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unsigned int head;
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int ret;
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mutex_lock(&eeprom->mutex);
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head = offset % RAVE_SP_EEPROM_PAGE_SIZE;
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residue = data_len;
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do {
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/*
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* First iteration, if we are doing an access that is
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* not 32-byte aligned, we need to access only data up
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* to a page boundary to avoid corssing it in
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* rave_sp_eeprom_page_access()
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*/
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if (unlikely(head)) {
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chunk = RAVE_SP_EEPROM_PAGE_SIZE - head;
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/*
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* This can only happen once per
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* rave_sp_eeprom_access() call, so we set
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* head to zero to process all the other
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* iterations normally.
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*/
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head = 0;
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} else {
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chunk = RAVE_SP_EEPROM_PAGE_SIZE;
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}
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/*
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* We should never read more that 'residue' bytes
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*/
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chunk = min(chunk, residue);
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ret = rave_sp_eeprom_page_access(eeprom, type, offset,
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data, chunk);
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if (ret)
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goto out;
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residue -= chunk;
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offset += chunk;
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data += chunk;
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} while (residue);
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out:
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mutex_unlock(&eeprom->mutex);
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return ret;
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}
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static int rave_sp_eeprom_reg_read(void *eeprom, unsigned int offset,
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void *val, size_t bytes)
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{
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return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_READ,
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offset, val, bytes);
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}
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static int rave_sp_eeprom_reg_write(void *eeprom, unsigned int offset,
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void *val, size_t bytes)
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{
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return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_WRITE,
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offset, val, bytes);
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}
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static int rave_sp_eeprom_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rave_sp *sp = dev_get_drvdata(dev->parent);
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struct device_node *np = dev->of_node;
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struct nvmem_config config = { 0 };
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struct rave_sp_eeprom *eeprom;
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struct nvmem_device *nvmem;
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u32 reg[2], size;
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if (of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg))) {
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dev_err(dev, "Failed to parse \"reg\" property\n");
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return -EINVAL;
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}
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size = reg[1];
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/*
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* Per ICD, we have no more than 2 bytes to specify EEPROM
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* page.
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*/
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if (size > U16_MAX * RAVE_SP_EEPROM_PAGE_SIZE) {
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dev_err(dev, "Specified size is too big\n");
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return -EINVAL;
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}
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eeprom = devm_kzalloc(dev, sizeof(*eeprom), GFP_KERNEL);
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if (!eeprom)
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return -ENOMEM;
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eeprom->address = reg[0];
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eeprom->sp = sp;
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eeprom->dev = dev;
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if (size > SZ_8K)
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eeprom->header_size = RAVE_SP_EEPROM_HEADER_BIG;
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else
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eeprom->header_size = RAVE_SP_EEPROM_HEADER_SMALL;
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mutex_init(&eeprom->mutex);
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config.id = -1;
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of_property_read_string(np, "zii,eeprom-name", &config.name);
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config.priv = eeprom;
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config.dev = dev;
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config.size = size;
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config.reg_read = rave_sp_eeprom_reg_read;
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config.reg_write = rave_sp_eeprom_reg_write;
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config.word_size = 1;
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config.stride = 1;
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nvmem = devm_nvmem_register(dev, &config);
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return PTR_ERR_OR_ZERO(nvmem);
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}
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static const struct of_device_id rave_sp_eeprom_of_match[] = {
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{ .compatible = "zii,rave-sp-eeprom" },
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{}
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};
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MODULE_DEVICE_TABLE(of, rave_sp_eeprom_of_match);
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static struct platform_driver rave_sp_eeprom_driver = {
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.probe = rave_sp_eeprom_probe,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = rave_sp_eeprom_of_match,
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},
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};
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module_platform_driver(rave_sp_eeprom_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Andrey Vostrikov <andrey.vostrikov@cogentembedded.com>");
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MODULE_AUTHOR("Nikita Yushchenko <nikita.yoush@cogentembedded.com>");
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MODULE_AUTHOR("Andrey Smirnov <andrew.smirnov@gmail.com>");
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MODULE_DESCRIPTION("RAVE SP EEPROM driver");
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