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usb: dwc2: Rename GLPMCFG... definitions

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Make field names of GLPMCFG register in definitions to be
the same with the databook.

Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com>
Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This commit is contained in:
Sevak Arakelyan 2018-01-24 17:41:22 +04:00 committed by Felipe Balbi
parent 600a490e18
commit 391f8081d2
1 changed files with 20 additions and 18 deletions
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38
drivers/usb/dwc2/hw.h
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@ -322,28 +322,30 @@
#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT 0 #define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT 0
#define GLPMCFG HSOTG_REG(0x0054) #define GLPMCFG HSOTG_REG(0x0054)
#define GLPMCFG_INV_SEL_HSIC BIT(31) #define GLPMCFG_INVSELHSIC BIT(31)
#define GLPMCFG_HSIC_CONNECT BIT(30) #define GLPMCFG_HSICCON BIT(30)
#define GLPMCFG_RETRY_COUNT_STS_MASK (0x7 << 25) #define GLPMCFG_RSTRSLPSTS BIT(29)
#define GLPMCFG_RETRY_COUNT_STS_SHIFT 25 #define GLPMCFG_ENBESL BIT(28)
#define GLPMCFG_SEND_LPM BIT(24) #define GLPMCFG_LPM_RETRYCNT_STS_MASK (0x7 << 25)
#define GLPMCFG_RETRY_COUNT_MASK (0x7 << 21) #define GLPMCFG_LPM_RETRYCNT_STS_SHIFT 25
#define GLPMCFG_RETRY_COUNT_SHIFT 21 #define GLPMCFG_SNDLPM BIT(24)
#define GLPMCFG_LPM_CHAN_INDEX_MASK (0xf << 17) #define GLPMCFG_RETRY_CNT_MASK (0x7 << 21)
#define GLPMCFG_LPM_CHAN_INDEX_SHIFT 17 #define GLPMCFG_RETRY_CNT_SHIFT 21
#define GLPMCFG_SLEEP_STATE_RESUMEOK BIT(16) #define GLPMCFG_LPM_CHNL_INDX_MASK (0xf << 17)
#define GLPMCFG_PRT_SLEEP_STS BIT(15) #define GLPMCFG_LPM_CHNL_INDX_SHIFT 17
#define GLPMCFG_LPM_RESP_MASK (0x3 << 13) #define GLPMCFG_L1RESUMEOK BIT(16)
#define GLPMCFG_LPM_RESP_SHIFT 13 #define GLPMCFG_SLPSTS BIT(15)
#define GLPMCFG_COREL1RES_MASK (0x3 << 13)
#define GLPMCFG_COREL1RES_SHIFT 13
#define GLPMCFG_HIRD_THRES_MASK (0x1f << 8) #define GLPMCFG_HIRD_THRES_MASK (0x1f << 8)
#define GLPMCFG_HIRD_THRES_SHIFT 8 #define GLPMCFG_HIRD_THRES_SHIFT 8
#define GLPMCFG_HIRD_THRES_EN (0x10 << 8) #define GLPMCFG_HIRD_THRES_EN (0x10 << 8)
#define GLPMCFG_EN_UTMI_SLEEP BIT(7) #define GLPMCFG_ENBLSLPM BIT(7)
#define GLPMCFG_REM_WKUP_EN BIT(6) #define GLPMCFG_BREMOTEWAKE BIT(6)
#define GLPMCFG_HIRD_MASK (0xf << 2) #define GLPMCFG_HIRD_MASK (0xf << 2)
#define GLPMCFG_HIRD_SHIFT 2 #define GLPMCFG_HIRD_SHIFT 2
#define GLPMCFG_APPL_RESP BIT(1) #define GLPMCFG_APPL1RES BIT(1)
#define GLPMCFG_LPM_CAP_EN BIT(0) #define GLPMCFG_LPMCAP BIT(0)
#define GPWRDN HSOTG_REG(0x0058) #define GPWRDN HSOTG_REG(0x0058)
#define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24) #define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24)