soc/tegra: cbb: Changes for v6.1-rc1

This introduces the CBB driver that is used to provide (a lot of)
 information about SErrors when things go wrong, instead of the kernel
 just crashing or hanging.
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Merge tag 'tegra-for-6.1-cbb' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: cbb: Changes for v6.1-rc1

This introduces the CBB driver that is used to provide (a lot of)
information about SErrors when things go wrong, instead of the kernel
just crashing or hanging.

* tag 'tegra-for-6.1-cbb' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: cbb: Add support for Tegra241 (Grace)
  soc/tegra: cbb: Add driver for Tegra234 CBB 2.0
  soc/tegra: cbb: Add CBB 1.0 driver for Tegra194
  soc/tegra: Set ERD bit to mask inband errors

Link: https://lore.kernel.org/r/20220916101957.1635854-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-09-23 18:04:29 +02:00
commit 3919d90535
9 changed files with 3766 additions and 2 deletions

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@ -161,3 +161,12 @@ config SOC_TEGRA30_VOLTAGE_COUPLER
bool "Voltage scaling support for Tegra30 SoCs"
depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST
depends on REGULATOR
config SOC_TEGRA_CBB
tristate "Tegra driver to handle error from CBB"
depends on ARCH_TEGRA_194_SOC || ARCH_TEGRA_234_SOC
default y
help
Support for handling error from Tegra Control Backbone(CBB).
This driver handles the errors from CBB and prints debug
information about the failed transactions.

View File

@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += fuse/
obj-y += cbb/
obj-y += common.o
obj-$(CONFIG_SOC_TEGRA_FLOWCTRL) += flowctrl.o

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@ -0,0 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
#
# Control Backbone Driver code.
#
ifdef CONFIG_SOC_TEGRA_CBB
obj-y += tegra-cbb.o
obj-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-cbb.o
obj-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-cbb.o
endif

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@ -0,0 +1,190 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved
*/
#include <linux/clk.h>
#include <linux/cpufeature.h>
#include <linux/debugfs.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/version.h>
#include <soc/tegra/fuse.h>
#include <soc/tegra/tegra-cbb.h>
void tegra_cbb_print_err(struct seq_file *file, const char *fmt, ...)
{
struct va_format vaf;
va_list args;
va_start(args, fmt);
if (file) {
seq_vprintf(file, fmt, args);
} else {
vaf.fmt = fmt;
vaf.va = &args;
pr_crit("%pV", &vaf);
}
va_end(args);
}
void tegra_cbb_print_cache(struct seq_file *file, u32 cache)
{
const char *buff_str, *mod_str, *rd_str, *wr_str;
buff_str = (cache & BIT(0)) ? "Bufferable " : "";
mod_str = (cache & BIT(1)) ? "Modifiable " : "";
rd_str = (cache & BIT(2)) ? "Read-Allocate " : "";
wr_str = (cache & BIT(3)) ? "Write-Allocate" : "";
if (cache == 0x0)
buff_str = "Device Non-Bufferable";
tegra_cbb_print_err(file, "\t Cache\t\t\t: 0x%x -- %s%s%s%s\n",
cache, buff_str, mod_str, rd_str, wr_str);
}
void tegra_cbb_print_prot(struct seq_file *file, u32 prot)
{
const char *data_str, *secure_str, *priv_str;
data_str = (prot & 0x4) ? "Instruction" : "Data";
secure_str = (prot & 0x2) ? "Non-Secure" : "Secure";
priv_str = (prot & 0x1) ? "Privileged" : "Unprivileged";
tegra_cbb_print_err(file, "\t Protection\t\t: 0x%x -- %s, %s, %s Access\n",
prot, priv_str, secure_str, data_str);
}
static int tegra_cbb_err_show(struct seq_file *file, void *data)
{
struct tegra_cbb *cbb = file->private;
return cbb->ops->debugfs_show(cbb, file, data);
}
static int tegra_cbb_err_open(struct inode *inode, struct file *file)
{
return single_open(file, tegra_cbb_err_show, inode->i_private);
}
static const struct file_operations tegra_cbb_err_fops = {
.open = tegra_cbb_err_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release
};
static int tegra_cbb_err_debugfs_init(struct tegra_cbb *cbb)
{
static struct dentry *root;
if (!root) {
root = debugfs_create_file("tegra_cbb_err", 0444, NULL, cbb, &tegra_cbb_err_fops);
if (IS_ERR_OR_NULL(root)) {
pr_err("%s(): could not create debugfs node\n", __func__);
return PTR_ERR(root);
}
}
return 0;
}
void tegra_cbb_stall_enable(struct tegra_cbb *cbb)
{
if (cbb->ops->stall_enable)
cbb->ops->stall_enable(cbb);
}
void tegra_cbb_fault_enable(struct tegra_cbb *cbb)
{
if (cbb->ops->fault_enable)
cbb->ops->fault_enable(cbb);
}
void tegra_cbb_error_clear(struct tegra_cbb *cbb)
{
if (cbb->ops->error_clear)
cbb->ops->error_clear(cbb);
}
u32 tegra_cbb_get_status(struct tegra_cbb *cbb)
{
if (cbb->ops->get_status)
return cbb->ops->get_status(cbb);
return 0;
}
int tegra_cbb_get_irq(struct platform_device *pdev, unsigned int *nonsec_irq,
unsigned int *sec_irq)
{
unsigned int index = 0;
int num_intr = 0, irq;
num_intr = platform_irq_count(pdev);
if (!num_intr)
return -EINVAL;
if (num_intr == 2) {
irq = platform_get_irq(pdev, index);
if (irq <= 0) {
dev_err(&pdev->dev, "failed to get non-secure IRQ: %d\n", irq);
return -ENOENT;
}
*nonsec_irq = irq;
index++;
}
irq = platform_get_irq(pdev, index);
if (irq <= 0) {
dev_err(&pdev->dev, "failed to get secure IRQ: %d\n", irq);
return -ENOENT;
}
*sec_irq = irq;
if (num_intr == 1)
dev_dbg(&pdev->dev, "secure IRQ: %u\n", *sec_irq);
if (num_intr == 2)
dev_dbg(&pdev->dev, "secure IRQ: %u, non-secure IRQ: %u\n", *sec_irq, *nonsec_irq);
return 0;
}
int tegra_cbb_register(struct tegra_cbb *cbb)
{
int ret;
if (IS_ENABLED(CONFIG_DEBUG_FS)) {
ret = tegra_cbb_err_debugfs_init(cbb);
if (ret) {
dev_err(cbb->dev, "failed to create debugfs\n");
return ret;
}
}
/* register interrupt handler for errors due to different initiators */
ret = cbb->ops->interrupt_enable(cbb);
if (ret < 0) {
dev_err(cbb->dev, "Failed to register CBB Interrupt ISR");
return ret;
}
cbb->ops->error_enable(cbb);
dsb(sy);
return 0;
}

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -16,12 +16,16 @@
#define FUSE_SKU_INFO 0x10
#define ERD_ERR_CONFIG 0x120c
#define ERD_MASK_INBAND_ERR 0x1
#define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4
#define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG \
(0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
#define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \
(0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
static void __iomem *apbmisc_base;
static bool long_ram_code;
static u32 strapping;
static u32 chipid;
@ -93,6 +97,28 @@ u32 tegra_read_ram_code(void)
}
EXPORT_SYMBOL_GPL(tegra_read_ram_code);
/*
* The function sets ERD(Error Response Disable) bit.
* This allows to mask inband errors and always send an
* OKAY response from CBB to the master which caused error.
*/
int tegra194_miscreg_mask_serror(void)
{
if (!apbmisc_base)
return -EPROBE_DEFER;
if (!of_machine_is_compatible("nvidia,tegra194")) {
WARN(1, "Only supported for Tegra194 devices!\n");
return -EOPNOTSUPP;
}
writel_relaxed(ERD_MASK_INBAND_ERR,
apbmisc_base + ERD_ERR_CONFIG);
return 0;
}
EXPORT_SYMBOL(tegra194_miscreg_mask_serror);
static const struct of_device_id apbmisc_match[] __initconst = {
{ .compatible = "nvidia,tegra20-apbmisc", },
{ .compatible = "nvidia,tegra186-misc", },
@ -134,7 +160,7 @@ void __init tegra_init_revision(void)
void __init tegra_init_apbmisc(void)
{
void __iomem *apbmisc_base, *strapping_base;
void __iomem *strapping_base;
struct resource apbmisc, straps;
struct device_node *np;
@ -196,7 +222,6 @@ void __init tegra_init_apbmisc(void)
pr_err("failed to map APBMISC registers\n");
} else {
chipid = readl_relaxed(apbmisc_base + 4);
iounmap(apbmisc_base);
}
strapping_base = ioremap(straps.start, resource_size(&straps));

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@ -58,6 +58,7 @@ u32 tegra_read_chipid(void);
u8 tegra_get_chip_id(void);
u8 tegra_get_platform(void);
bool tegra_is_silicon(void);
int tegra194_miscreg_mask_serror(void);
#else
static struct tegra_sku_info tegra_sku_info __maybe_unused;
@ -95,6 +96,11 @@ static inline bool tegra_is_silicon(void)
{
return false;
}
static inline int tegra194_miscreg_mask_serror(void)
{
return false;
}
#endif
struct device *tegra_soc_device_register(void);

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@ -0,0 +1,47 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved
*/
#ifndef TEGRA_CBB_H
#define TEGRA_CBB_H
#include <linux/list.h>
struct tegra_cbb_error {
const char *code;
const char *source;
const char *desc;
};
struct tegra_cbb {
struct device *dev;
const struct tegra_cbb_ops *ops;
struct list_head node;
};
struct tegra_cbb_ops {
int (*debugfs_show)(struct tegra_cbb *cbb, struct seq_file *s, void *v);
int (*interrupt_enable)(struct tegra_cbb *cbb);
void (*error_enable)(struct tegra_cbb *cbb);
void (*fault_enable)(struct tegra_cbb *cbb);
void (*stall_enable)(struct tegra_cbb *cbb);
void (*error_clear)(struct tegra_cbb *cbb);
u32 (*get_status)(struct tegra_cbb *cbb);
};
int tegra_cbb_get_irq(struct platform_device *pdev, unsigned int *nonsec_irq,
unsigned int *sec_irq);
__printf(2, 3)
void tegra_cbb_print_err(struct seq_file *file, const char *fmt, ...);
void tegra_cbb_print_cache(struct seq_file *file, u32 cache);
void tegra_cbb_print_prot(struct seq_file *file, u32 prot);
int tegra_cbb_register(struct tegra_cbb *cbb);
void tegra_cbb_fault_enable(struct tegra_cbb *cbb);
void tegra_cbb_stall_enable(struct tegra_cbb *cbb);
void tegra_cbb_error_clear(struct tegra_cbb *cbb);
u32 tegra_cbb_get_status(struct tegra_cbb *cbb);
#endif /* TEGRA_CBB_H */