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MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction
MIPS R6 introduced the following instruction: Stores in fd a bit mask reflecting the floating-point class of the floating point scalar value fs. CLASS.fmt: FPR[fd] = class(FPR[fs]) Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10959/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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400bd2e413
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@ -4,9 +4,9 @@
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obj-y += cp1emu.o ieee754dp.o ieee754sp.o ieee754.o \
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dp_div.o dp_mul.o dp_sub.o dp_add.o dp_fsp.o dp_cmp.o dp_simple.o \
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dp_tint.o dp_fint.o dp_maddf.o dp_msubf.o \
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dp_tint.o dp_fint.o dp_maddf.o dp_msubf.o dp_2008class.o \
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sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_simple.o \
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sp_tint.o sp_fint.o sp_maddf.o sp_msubf.o \
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sp_tint.o sp_fint.o sp_maddf.o sp_msubf.o sp_2008class.o \
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dsemul.o
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lib-y += ieee754d.o \
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@ -1803,6 +1803,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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goto copcsr;
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}
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case fclass_op: {
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union ieee754sp fs;
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if (!cpu_has_mips_r6)
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return SIGILL;
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SPFROMREG(fs, MIPSInst_FS(ir));
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rv.w = ieee754sp_2008class(fs);
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rfmt = w_fmt;
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break;
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}
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case fabs_op:
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handler.u = ieee754sp_abs;
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goto scopuop;
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@ -2061,6 +2073,18 @@ copcsr:
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goto copcsr;
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}
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case fclass_op: {
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union ieee754dp fs;
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if (!cpu_has_mips_r6)
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return SIGILL;
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DPFROMREG(fs, MIPSInst_FS(ir));
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rv.w = ieee754dp_2008class(fs);
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rfmt = w_fmt;
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break;
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}
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case fabs_op:
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handler.u = ieee754dp_abs;
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goto dcopuop;
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55
arch/mips/math-emu/dp_2008class.c
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55
arch/mips/math-emu/dp_2008class.c
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@ -0,0 +1,55 @@
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/*
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* IEEE754 floating point arithmetic
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* double precision: CLASS.f
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* FPR[fd] = class(FPR[fs])
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*
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* MIPS floating point support
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* Copyright (C) 2015 Imagination Technologies, Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License.
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*/
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#include "ieee754dp.h"
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int ieee754dp_2008class(union ieee754dp x)
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{
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COMPXDP;
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EXPLODEXDP;
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/*
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* 10 bit mask as follows:
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*
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* bit0 = SNAN
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* bit1 = QNAN
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* bit2 = -INF
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* bit3 = -NORM
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* bit4 = -DNORM
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* bit5 = -ZERO
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* bit6 = INF
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* bit7 = NORM
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* bit8 = DNORM
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* bit9 = ZERO
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*/
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switch(xc) {
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case IEEE754_CLASS_SNAN:
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return 0x01;
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case IEEE754_CLASS_QNAN:
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return 0x02;
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case IEEE754_CLASS_INF:
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return 0x04 << (xs ? 0 : 4);
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case IEEE754_CLASS_NORM:
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return 0x08 << (xs ? 0 : 4);
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case IEEE754_CLASS_DNORM:
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return 0x10 << (xs ? 0 : 4);
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case IEEE754_CLASS_ZERO:
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return 0x20 << (xs ? 0 : 4);
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default:
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pr_err("Unknown class: %d\n", xc);
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return 0;
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}
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}
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@ -79,6 +79,7 @@ union ieee754sp ieee754sp_maddf(union ieee754sp z, union ieee754sp x,
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union ieee754sp y);
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union ieee754sp ieee754sp_msubf(union ieee754sp z, union ieee754sp x,
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union ieee754sp y);
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int ieee754sp_2008class(union ieee754sp x);
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/*
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* double precision (often aka double)
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@ -108,6 +109,7 @@ union ieee754dp ieee754dp_maddf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y);
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union ieee754dp ieee754dp_msubf(union ieee754dp z, union ieee754dp x,
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union ieee754dp y);
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int ieee754dp_2008class(union ieee754dp x);
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/* 5 types of floating point number
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55
arch/mips/math-emu/sp_2008class.c
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55
arch/mips/math-emu/sp_2008class.c
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@ -0,0 +1,55 @@
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/*
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* IEEE754 floating point arithmetic
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* single precision: CLASS.f
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* FPR[fd] = class(FPR[fs])
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*
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* MIPS floating point support
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* Copyright (C) 2015 Imagination Technologies, Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License.
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*/
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#include "ieee754sp.h"
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int ieee754sp_2008class(union ieee754sp x)
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{
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COMPXSP;
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EXPLODEXSP;
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/*
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* 10 bit mask as follows:
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*
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* bit0 = SNAN
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* bit1 = QNAN
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* bit2 = -INF
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* bit3 = -NORM
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* bit4 = -DNORM
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* bit5 = -ZERO
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* bit6 = INF
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* bit7 = NORM
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* bit8 = DNORM
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* bit9 = ZERO
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*/
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switch(xc) {
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case IEEE754_CLASS_SNAN:
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return 0x01;
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case IEEE754_CLASS_QNAN:
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return 0x02;
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case IEEE754_CLASS_INF:
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return 0x04 << (xs ? 0 : 4);
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case IEEE754_CLASS_NORM:
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return 0x08 << (xs ? 0 : 4);
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case IEEE754_CLASS_DNORM:
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return 0x10 << (xs ? 0 : 4);
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case IEEE754_CLASS_ZERO:
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return 0x20 << (xs ? 0 : 4);
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default:
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pr_err("Unknown class: %d\n", xc);
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return 0;
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}
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}
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