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regmap: Updates for v6.13
The main thing for regmap this time around is some improvements of the lockdep annotations which stop some false positives. We also have one new helper for setting a bitmask to the same value, and several test improvements. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmc7OlQACgkQJNaLcl1U h9B9nAf5AQIZ8AddQuudV4SoZbS2TWoGOOgjEXQnY245C4kNMnwJ1rIbHu7WJ/OE oVt7ePo7HW0CzpwIrNvdlV+9J3b+XR6xA1/rAJqI+TTPM3FMn33XGZ+0r+ZDVkBT 83/ZwLDPbRIVhwUgyHl0dIb5/pJddYVmJEDFHmRPY9Z8QQ4WPQn4SZvTfvF4y16C CJAV58A7Ei0MmnrJrGV3lF00qpkWMxdlpJu8TYgC1hM/hv9LAvVMEijuCpNR9NR5 udP+jPe2kA+IIlXEfvoxnJ/x9BgSf6CPLYV2nugFZsdGAfhI8EB3v/SC7gqlGVR7 tu4TR55KIh+lthRyD2uFRrI5GlzFvw== =epDO -----END PGP SIGNATURE----- Merge tag 'regmap-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "The main thing for regmap this time around is some improvements of the lockdep annotations which stop some false positives. We also have one new helper for setting a bitmask to the same value, and several test improvements" * tag 'regmap-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: regmap: provide regmap_assign_bits() regmap: irq: Set lockdep class for hierarchical IRQ domains regmap: maple: Provide lockdep (sub)class for maple tree's internal lock regmap: kunit: Fix repeated test param regcache: Improve documentation of available cache types regmap: Specifically test writing 0 as a value to sparse caches regmap-irq: Consistently use memset32() in regmap_irq_thread()
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37c7d3538a
@ -59,6 +59,7 @@ struct regmap {
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unsigned long raw_spinlock_flags;
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};
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};
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struct lock_class_key *lock_key;
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regmap_lock lock;
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regmap_unlock unlock;
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void *lock_arg; /* This is passed to lock/unlock functions */
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@ -355,6 +355,9 @@ static int regcache_maple_init(struct regmap *map)
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mt_init(mt);
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if (!mt_external_lock(mt) && map->lock_key)
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lockdep_set_class_and_subclass(&mt->ma_lock, map->lock_key, 1);
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if (!map->num_reg_defaults)
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return 0;
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@ -364,14 +364,11 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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memset32(data->status_buf, GENMASK(31, 0), chip->num_regs);
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} else if (chip->num_main_regs) {
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unsigned int max_main_bits;
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unsigned long size;
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size = chip->num_regs * sizeof(unsigned int);
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max_main_bits = (chip->num_main_status_bits) ?
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chip->num_main_status_bits : chip->num_regs;
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/* Clear the status buf as we don't read all status regs */
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memset(data->status_buf, 0, size);
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memset32(data->status_buf, 0, chip->num_regs);
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/* We could support bulk read for main status registers
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* but I don't expect to see devices with really many main
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@ -514,12 +511,16 @@ exit:
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return IRQ_NONE;
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}
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static struct lock_class_key regmap_irq_lock_class;
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static struct lock_class_key regmap_irq_request_class;
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static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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struct regmap_irq_chip_data *data = h->host_data;
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irq_set_chip_data(virq, data);
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irq_set_lockdep_class(virq, ®map_irq_lock_class, ®map_irq_request_class);
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irq_set_chip(virq, &data->irq_chip);
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irq_set_nested_thread(virq, 1);
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irq_set_parent(virq, data->irq);
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@ -126,7 +126,7 @@ static const struct regmap_test_param real_cache_types_list[] = {
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{ .cache = REGCACHE_RBTREE, .from_reg = 0x2003 },
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{ .cache = REGCACHE_RBTREE, .from_reg = 0x2004 },
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{ .cache = REGCACHE_MAPLE, .from_reg = 0 },
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{ .cache = REGCACHE_RBTREE, .from_reg = 0, .fast_io = true },
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{ .cache = REGCACHE_MAPLE, .from_reg = 0, .fast_io = true },
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{ .cache = REGCACHE_MAPLE, .from_reg = 0x2001 },
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{ .cache = REGCACHE_MAPLE, .from_reg = 0x2002 },
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{ .cache = REGCACHE_MAPLE, .from_reg = 0x2003 },
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@ -1499,6 +1499,48 @@ static void cache_present(struct kunit *test)
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KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, param->from_reg + i));
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}
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static void cache_write_zero(struct kunit *test)
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{
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const struct regmap_test_param *param = test->param_value;
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struct regmap *map;
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struct regmap_config config;
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struct regmap_ram_data *data;
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unsigned int val;
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int i;
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config = test_regmap_config;
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map = gen_regmap(test, &config, &data);
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KUNIT_ASSERT_FALSE(test, IS_ERR(map));
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if (IS_ERR(map))
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return;
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for (i = 0; i < BLOCK_TEST_SIZE; i++)
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data->read[param->from_reg + i] = false;
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/* No defaults so no registers cached. */
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for (i = 0; i < BLOCK_TEST_SIZE; i++)
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KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, param->from_reg + i));
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/* We didn't trigger any reads */
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for (i = 0; i < BLOCK_TEST_SIZE; i++)
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KUNIT_ASSERT_FALSE(test, data->read[param->from_reg + i]);
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/* Write a zero value */
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KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 1, 0));
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/* Read that zero value back */
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KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 1, &val));
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KUNIT_EXPECT_EQ(test, 0, val);
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/* From the cache? */
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KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, 1));
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/* Try to throw it away */
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KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 1, 1));
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KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, 1));
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}
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/* Check that caching the window register works with sync */
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static void cache_range_window_reg(struct kunit *test)
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{
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@ -2012,6 +2054,7 @@ static struct kunit_case regmap_test_cases[] = {
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KUNIT_CASE_PARAM(cache_drop_all_and_sync_no_defaults, sparse_cache_types_gen_params),
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KUNIT_CASE_PARAM(cache_drop_all_and_sync_has_defaults, sparse_cache_types_gen_params),
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KUNIT_CASE_PARAM(cache_present, sparse_cache_types_gen_params),
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KUNIT_CASE_PARAM(cache_write_zero, sparse_cache_types_gen_params),
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KUNIT_CASE_PARAM(cache_range_window_reg, real_cache_types_only_gen_params),
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KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params),
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@ -745,6 +745,7 @@ struct regmap *__regmap_init(struct device *dev,
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lock_key, lock_name);
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}
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map->lock_arg = map;
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map->lock_key = lock_key;
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}
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/*
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@ -54,7 +54,14 @@ struct sdw_slave;
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#define REGMAP_UPSHIFT(s) (-(s))
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#define REGMAP_DOWNSHIFT(s) (s)
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/* An enum of all the supported cache types */
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/*
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* The supported cache types, the default is no cache. Any new caches
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* should usually use the maple tree cache unless they specifically
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* require that there are never any allocations at runtime and can't
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* provide defaults in which case they should use the flat cache. The
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* rbtree cache *may* have some performance advantage for very low end
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* systems that make heavy use of cache syncs but is mainly legacy.
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*/
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enum regcache_type {
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REGCACHE_NONE,
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REGCACHE_RBTREE,
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@ -1328,6 +1335,15 @@ static inline int regmap_clear_bits(struct regmap *map,
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return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
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}
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static inline int regmap_assign_bits(struct regmap *map, unsigned int reg,
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unsigned int bits, bool value)
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{
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if (value)
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return regmap_set_bits(map, reg, bits);
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else
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return regmap_clear_bits(map, reg, bits);
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}
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int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
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/**
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@ -1796,6 +1812,13 @@ static inline int regmap_clear_bits(struct regmap *map,
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return -EINVAL;
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}
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static inline int regmap_assign_bits(struct regmap *map, unsigned int reg,
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unsigned int bits, bool value)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_test_bits(struct regmap *map,
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unsigned int reg, unsigned int bits)
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{
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