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usb: phy: Remove unused Renesas R-Car (Gen1) USB PHY driver
As of commit 3d7608e4c1 ("ARM: shmobile: bockw: remove legacy
board file and config"), the Renesas R-Car (Gen1) USB PHY driver is no
longer used.
In theory it could still be used on R-Car Gen1 SoCs, but that would
require adding DT support to the driver. Instead, a new driver using the
generic PHY framework should be written, as was done for R-Car Gen2.
Remove the driver for good.
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Geert Uytterhoeven
Felipe Balbi
parent
2de59c09fe
commit
375da6271b
@ -186,19 +186,6 @@ config USB_MXS_PHY
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MXS Phy is used by some of the i.MX SoCs, for example imx23/28/6x.
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config USB_RCAR_PHY
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tristate "Renesas R-Car USB PHY support"
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depends on USB || USB_GADGET
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depends on ARCH_R8A7778 || ARCH_R8A7779 || COMPILE_TEST
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select USB_PHY
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help
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Say Y here to add support for the Renesas R-Car USB common PHY driver.
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This chip is typically used as USB PHY for USB host, gadget.
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This driver supports R8A7778 and R8A7779.
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To compile this driver as a module, choose M here: the
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module will be called phy-rcar-usb.
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config USB_ULPI
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bool "Generic ULPI Transceiver Driver"
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depends on ARM || ARM64
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@ -23,7 +23,6 @@ obj-$(CONFIG_USB_MSM_OTG) += phy-msm-usb.o
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obj-$(CONFIG_USB_QCOM_8X16_PHY) += phy-qcom-8x16-usb.o
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obj-$(CONFIG_USB_MV_OTG) += phy-mv-usb.o
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obj-$(CONFIG_USB_MXS_PHY) += phy-mxs-usb.o
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obj-$(CONFIG_USB_RCAR_PHY) += phy-rcar-usb.o
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obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
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obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi-viewport.o
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obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
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@ -1,247 +0,0 @@
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/*
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* Renesas R-Car USB phy driver
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*
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* Copyright (C) 2012-2013 Renesas Solutions Corp.
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* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/usb/otg.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <linux/platform_data/usb-rcar-phy.h>
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/* REGS block */
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#define USBPCTRL0 0x00
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#define USBPCTRL1 0x04
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#define USBST 0x08
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#define USBEH0 0x0C
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#define USBOH0 0x1C
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#define USBCTL0 0x58
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/* High-speed signal quality characteristic control registers (R8A7778 only) */
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#define HSQCTL1 0x24
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#define HSQCTL2 0x28
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/* USBPCTRL0 */
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#define OVC2 (1 << 10) /* (R8A7779 only) */
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/* Switches the OVC input pin for port 2: */
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/* 1: USB_OVC2, 0: OVC2 */
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#define OVC1_VBUS1 (1 << 9) /* Switches the OVC input pin for port 1: */
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/* 1: USB_OVC1, 0: OVC1/VBUS1 */
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/* Function mode: set to 0 */
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#define OVC0 (1 << 8) /* Switches the OVC input pin for port 0: */
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/* 1: USB_OVC0 pin, 0: OVC0 */
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#define OVC2_ACT (1 << 6) /* (R8A7779 only) */
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/* Host mode: OVC2 polarity: */
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/* 1: active-high, 0: active-low */
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#define PENC (1 << 4) /* Function mode: output level of PENC1 pin: */
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/* 1: high, 0: low */
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#define OVC0_ACT (1 << 3) /* Host mode: OVC0 polarity: */
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/* 1: active-high, 0: active-low */
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#define OVC1_ACT (1 << 1) /* Host mode: OVC1 polarity: */
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/* 1: active-high, 0: active-low */
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/* Function mode: be sure to set to 1 */
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#define PORT1 (1 << 0) /* Selects port 1 mode: */
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/* 1: function, 0: host */
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/* USBPCTRL1 */
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#define PHY_RST (1 << 2)
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#define PLL_ENB (1 << 1)
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#define PHY_ENB (1 << 0)
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/* USBST */
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#define ST_ACT (1 << 31)
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#define ST_PLL (1 << 30)
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struct rcar_usb_phy_priv {
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struct usb_phy phy;
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spinlock_t lock;
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void __iomem *reg0;
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void __iomem *reg1;
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int counter;
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};
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#define usb_phy_to_priv(p) container_of(p, struct rcar_usb_phy_priv, phy)
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/*
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* USB initial/install operation.
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*
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* This function setup USB phy.
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* The used value and setting order came from
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* [USB :: Initial setting] on datasheet.
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*/
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static int rcar_usb_phy_init(struct usb_phy *phy)
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{
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struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy);
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struct device *dev = phy->dev;
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struct rcar_phy_platform_data *pdata = dev_get_platdata(dev);
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void __iomem *reg0 = priv->reg0;
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void __iomem *reg1 = priv->reg1;
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static const u8 ovcn_act[] = { OVC0_ACT, OVC1_ACT, OVC2_ACT };
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int i;
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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if (priv->counter++ == 0) {
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/*
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* USB phy start-up
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*/
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/* (1) USB-PHY standby release */
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iowrite32(PHY_ENB, (reg0 + USBPCTRL1));
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/* (2) start USB-PHY internal PLL */
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iowrite32(PHY_ENB | PLL_ENB, (reg0 + USBPCTRL1));
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/* (3) set USB-PHY in accord with the conditions of usage */
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if (reg1) {
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u32 hsqctl1 = pdata->ferrite_bead ? 0x41 : 0;
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u32 hsqctl2 = pdata->ferrite_bead ? 0x0d : 7;
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iowrite32(hsqctl1, reg1 + HSQCTL1);
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iowrite32(hsqctl2, reg1 + HSQCTL2);
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}
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/* (4) USB module status check */
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for (i = 0; i < 1024; i++) {
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udelay(10);
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val = ioread32(reg0 + USBST);
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if (val == (ST_ACT | ST_PLL))
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break;
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}
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if (val != (ST_ACT | ST_PLL)) {
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dev_err(dev, "USB phy not ready\n");
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goto phy_init_end;
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}
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/* (5) USB-PHY reset clear */
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iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1));
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/* Board specific port settings */
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val = 0;
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if (pdata->port1_func)
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val |= PORT1;
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if (pdata->penc1)
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val |= PENC;
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for (i = 0; i < 3; i++) {
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/* OVCn bits follow each other in the right order */
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if (pdata->ovc_pin[i].select_3_3v)
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val |= OVC0 << i;
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/* OVCn_ACT bits are spaced by irregular intervals */
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if (pdata->ovc_pin[i].active_high)
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val |= ovcn_act[i];
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}
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iowrite32(val, (reg0 + USBPCTRL0));
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/*
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* Bus alignment settings
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*/
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/* (1) EHCI bus alignment (little endian) */
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iowrite32(0x00000000, (reg0 + USBEH0));
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/* (1) OHCI bus alignment (little endian) */
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iowrite32(0x00000000, (reg0 + USBOH0));
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}
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phy_init_end:
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static void rcar_usb_phy_shutdown(struct usb_phy *phy)
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{
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struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy);
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void __iomem *reg0 = priv->reg0;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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if (priv->counter-- == 1) /* last user */
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iowrite32(0x00000000, (reg0 + USBPCTRL1));
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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static int rcar_usb_phy_probe(struct platform_device *pdev)
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{
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struct rcar_usb_phy_priv *priv;
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struct resource *res0, *res1;
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struct device *dev = &pdev->dev;
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void __iomem *reg0, *reg1 = NULL;
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int ret;
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if (!dev_get_platdata(&pdev->dev)) {
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dev_err(dev, "No platform data\n");
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return -EINVAL;
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}
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res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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reg0 = devm_ioremap_resource(dev, res0);
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if (IS_ERR(reg0))
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return PTR_ERR(reg0);
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res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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reg1 = devm_ioremap_resource(dev, res1);
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if (IS_ERR(reg1))
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return PTR_ERR(reg1);
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->reg0 = reg0;
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priv->reg1 = reg1;
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priv->counter = 0;
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priv->phy.dev = dev;
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priv->phy.label = dev_name(dev);
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priv->phy.init = rcar_usb_phy_init;
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priv->phy.shutdown = rcar_usb_phy_shutdown;
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spin_lock_init(&priv->lock);
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ret = usb_add_phy(&priv->phy, USB_PHY_TYPE_USB2);
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if (ret < 0) {
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dev_err(dev, "usb phy addition error\n");
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return ret;
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}
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platform_set_drvdata(pdev, priv);
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return ret;
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}
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static int rcar_usb_phy_remove(struct platform_device *pdev)
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{
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struct rcar_usb_phy_priv *priv = platform_get_drvdata(pdev);
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usb_remove_phy(&priv->phy);
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return 0;
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}
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static struct platform_driver rcar_usb_phy_driver = {
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.driver = {
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.name = "rcar_usb_phy",
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},
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.probe = rcar_usb_phy_probe,
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.remove = rcar_usb_phy_remove,
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};
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module_platform_driver(rcar_usb_phy_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Renesas R-Car USB phy");
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MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
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@ -1,28 +0,0 @@
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/*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __USB_RCAR_PHY_H
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#define __USB_RCAR_PHY_H
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#include <linux/types.h>
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struct rcar_phy_platform_data {
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bool ferrite_bead:1; /* (R8A7778 only) */
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bool port1_func:1; /* true: port 1 used by function, false: host */
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unsigned penc1:1; /* Output of the PENC1 pin in function mode */
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struct { /* Overcurrent pin control for ports 0..2 */
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bool select_3_3v:1; /* true: USB_OVCn pin, false: OVCn pin */
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/* Set to false on port 1 in function mode */
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bool active_high:1; /* true: active high, false: active low */
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/* Set to true on port 1 in function mode */
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} ovc_pin[3]; /* (R8A7778 only has 2 ports) */
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};
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#endif /* __USB_RCAR_PHY_H */
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