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davinci: DA8xx: CFGCHIP2 register definitions
These are needed by the MUSB and OHCI glue layers... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -36,6 +36,7 @@ extern void __iomem *da8xx_syscfg_base;
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#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000)
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#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x))
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#define DA8XX_JTAG_ID_REG 0x18
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#define DA8XX_CFGCHIP2_REG 0x184
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#define DA8XX_CFGCHIP3_REG 0x188
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#define DA8XX_PSC0_BASE 0x01c10000
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37
arch/arm/mach-davinci/include/mach/usb.h
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37
arch/arm/mach-davinci/include/mach/usb.h
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@ -0,0 +1,37 @@
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/*
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* USB related definitions
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*
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* Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_USB_H
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#define __ASM_ARCH_USB_H
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/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */
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#define CFGCHIP2_PHYCLKGD (1 << 17)
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#define CFGCHIP2_VBUSSENSE (1 << 16)
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#define CFGCHIP2_RESET (1 << 15)
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#define CFGCHIP2_OTGMODE (3 << 13)
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#define CFGCHIP2_NO_OVERRIDE (0 << 13)
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#define CFGCHIP2_FORCE_HOST (1 << 13)
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#define CFGCHIP2_FORCE_DEVICE (2 << 13)
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#define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13)
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#define CFGCHIP2_USB1PHYCLKMUX (1 << 12)
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#define CFGCHIP2_USB2PHYCLKMUX (1 << 11)
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#define CFGCHIP2_PHYPWRDN (1 << 10)
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#define CFGCHIP2_OTGPWRDN (1 << 9)
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#define CFGCHIP2_DATPOL (1 << 8)
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#define CFGCHIP2_USB1SUSPENDM (1 << 7)
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#define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */
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#define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */
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#define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */
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#define CFGCHIP2_REFFREQ (0xf << 0)
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#define CFGCHIP2_REFFREQ_12MHZ (1 << 0)
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#define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
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#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
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#endif /* ifndef __ASM_ARCH_USB_H */
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