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https://github.com/torvalds/linux.git
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Short summary of fixes pull:
nouveau: - use tile_mode and pte_kind for VM_BIND bo allocations -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEchf7rIzpz2NEoWjlaA3BHVMLeiMFAmZFtP4ACgkQaA3BHVML eiO0KAf9HshJjz+QEi+S0s6Z4p1pQqZgq1sgIhAzNl7LpINYeSHtlFK4erGgjWzu lGat8s1kh/7n4NDvsxf7+F0SSd7S8Pqx5DqaFrDDeW1L3YdRQ0X59IVvqFbPZCGH 3GAFgg3gKWJBOEaHCYdMTDXj5mVM2OGxwCjw6x1hek/CUyuKgMTFSHRAEpQI7W2j GYU5Gite/gO+/GlNr+6rPcOGPghdDACZqMRT/r8H0PP1SZoyI0lzJzZt0R/PrIDw EClWH01l+M+OM7p6VzJ/RmvSP9lI7z8w3xvCkeQgRow0J6+jkSxC0JsRa6GXq9u7 g04YSb5fNpRLDzIA9KZKJyuO1Cuhkg== =kvVW -----END PGP SIGNATURE----- Merge tag 'drm-misc-fixes-2024-05-16' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next Short summary of fixes pull: nouveau: - use tile_mode and pte_kind for VM_BIND bo allocations Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20240516072658.GA8395@linux.fritz.box
This commit is contained in:
Daniel Vetter
commit
36f53d622a
@ -2940,7 +2940,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
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dev->mode_config.max_width,
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dev->mode_config.max_height);
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else
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drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe",
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drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe\n",
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connector->base.id, connector->name);
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}
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@ -7,13 +7,14 @@
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#include "pvr_rogue_mips.h"
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#include <asm/page.h>
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#include <linux/math.h>
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#include <linux/types.h>
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/* Forward declaration from pvr_gem.h. */
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struct pvr_gem_object;
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#define PVR_MIPS_PT_PAGE_COUNT ((ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K) \
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>> PAGE_SHIFT)
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#define PVR_MIPS_PT_PAGE_COUNT DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)
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/**
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* struct pvr_fw_mips_data - MIPS-specific data
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*/
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@ -106,6 +106,8 @@
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#define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */
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#define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */
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#define HHI_HDMI_PHY_CNTL1 0x3a4 /* 0xe9 */
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#define PHY_CNTL1_INIT 0x03900000
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#define PHY_INVERT BIT(17)
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#define HHI_HDMI_PHY_CNTL2 0x3a8 /* 0xea */
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#define HHI_HDMI_PHY_CNTL3 0x3ac /* 0xeb */
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#define HHI_HDMI_PHY_CNTL4 0x3b0 /* 0xec */
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@ -130,6 +132,8 @@ struct meson_dw_hdmi_data {
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unsigned int addr);
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void (*dwc_write)(struct meson_dw_hdmi *dw_hdmi,
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unsigned int addr, unsigned int data);
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u32 cntl0_init;
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u32 cntl1_init;
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};
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struct meson_dw_hdmi {
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@ -384,26 +388,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
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dw_hdmi_bus_fmt_is_420(hdmi))
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mode_is_420 = true;
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/* Enable clocks */
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regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
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/* Bring HDMITX MEM output of power down */
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regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
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/* Bring out of reset */
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dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_SW_RESET, 0);
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/* Enable internal pixclk, tmds_clk, spdif_clk, i2s_clk, cecclk */
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dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,
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0x3, 0x3);
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/* Enable cec_clk and hdcp22_tmdsclk_en */
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dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,
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0x3 << 4, 0x3 << 4);
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/* Enable normal output to PHY */
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dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));
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/* TMDS pattern setup */
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if (mode->clock > 340000 && !mode_is_420) {
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dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,
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@ -425,20 +409,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
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/* Setup PHY parameters */
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meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420);
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/* Setup PHY */
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regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
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0xffff << 16, 0x0390 << 16);
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/* BIT_INVERT */
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if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||
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dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi") ||
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dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))
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regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
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BIT(17), 0);
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else
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regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,
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BIT(17), BIT(17));
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/* Disable clock, fifo, fifo_wr */
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regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);
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@ -492,7 +462,9 @@ static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,
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DRM_DEBUG_DRIVER("\n");
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regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0);
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/* Fallback to init mode */
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regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, dw_hdmi->data->cntl1_init);
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regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, dw_hdmi->data->cntl0_init);
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}
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static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,
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@ -610,11 +582,22 @@ static const struct regmap_config meson_dw_hdmi_regmap_config = {
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.fast_io = true,
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};
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static const struct meson_dw_hdmi_data meson_dw_hdmi_gx_data = {
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static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = {
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.top_read = dw_hdmi_top_read,
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.top_write = dw_hdmi_top_write,
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.dwc_read = dw_hdmi_dwc_read,
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.dwc_write = dw_hdmi_dwc_write,
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.cntl0_init = 0x0,
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.cntl1_init = PHY_CNTL1_INIT | PHY_INVERT,
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};
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static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = {
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.top_read = dw_hdmi_top_read,
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.top_write = dw_hdmi_top_write,
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.dwc_read = dw_hdmi_dwc_read,
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.dwc_write = dw_hdmi_dwc_write,
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.cntl0_init = 0x0,
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.cntl1_init = PHY_CNTL1_INIT,
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};
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static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
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@ -622,6 +605,8 @@ static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = {
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.top_write = dw_hdmi_g12a_top_write,
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.dwc_read = dw_hdmi_g12a_dwc_read,
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.dwc_write = dw_hdmi_g12a_dwc_write,
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.cntl0_init = 0x000b4242, /* Bandgap */
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.cntl1_init = PHY_CNTL1_INIT,
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};
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static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
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@ -656,6 +641,13 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
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meson_dw_hdmi->data->top_write(meson_dw_hdmi,
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HDMITX_TOP_CLK_CNTL, 0xff);
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/* Enable normal output to PHY */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));
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/* Setup PHY */
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regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, meson_dw_hdmi->data->cntl1_init);
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regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, meson_dw_hdmi->data->cntl0_init);
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/* Enable HDMI-TX Interrupt */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
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HDMITX_TOP_INTR_CORE);
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@ -865,11 +857,11 @@ static const struct dev_pm_ops meson_dw_hdmi_pm_ops = {
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static const struct of_device_id meson_dw_hdmi_of_table[] = {
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{ .compatible = "amlogic,meson-gxbb-dw-hdmi",
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.data = &meson_dw_hdmi_gx_data },
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.data = &meson_dw_hdmi_gxbb_data },
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{ .compatible = "amlogic,meson-gxl-dw-hdmi",
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.data = &meson_dw_hdmi_gx_data },
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.data = &meson_dw_hdmi_gxl_data },
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{ .compatible = "amlogic,meson-gxm-dw-hdmi",
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.data = &meson_dw_hdmi_gx_data },
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.data = &meson_dw_hdmi_gxl_data },
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{ .compatible = "amlogic,meson-g12a-dw-hdmi",
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.data = &meson_dw_hdmi_g12a_data },
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{ }
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@ -15,7 +15,9 @@ struct nvkm_gsp_mem {
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};
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struct nvkm_gsp_radix3 {
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struct nvkm_gsp_mem mem[3];
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struct nvkm_gsp_mem lvl0;
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struct nvkm_gsp_mem lvl1;
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struct sg_table lvl2;
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};
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int nvkm_gsp_sg(struct nvkm_device *, u64 size, struct sg_table *);
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@ -205,7 +205,9 @@ nvkm_firmware_dtor(struct nvkm_firmware *fw)
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break;
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case NVKM_FIRMWARE_IMG_DMA:
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nvkm_memory_unref(&memory);
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dma_free_coherent(fw->device->dev, sg_dma_len(&fw->mem.sgl), fw->img, fw->phys);
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dma_unmap_single(fw->device->dev, fw->phys, sg_dma_len(&fw->mem.sgl),
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DMA_TO_DEVICE);
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kfree(fw->img);
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break;
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case NVKM_FIRMWARE_IMG_SGT:
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nvkm_memory_unref(&memory);
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@ -235,14 +237,17 @@ nvkm_firmware_ctor(const struct nvkm_firmware_func *func, const char *name,
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fw->img = kmemdup(src, fw->len, GFP_KERNEL);
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break;
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case NVKM_FIRMWARE_IMG_DMA: {
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dma_addr_t addr;
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len = ALIGN(fw->len, PAGE_SIZE);
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fw->img = dma_alloc_coherent(fw->device->dev, len, &addr, GFP_KERNEL);
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if (fw->img) {
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memcpy(fw->img, src, fw->len);
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fw->phys = addr;
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fw->img = kmalloc(len, GFP_KERNEL);
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if (!fw->img)
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return -ENOMEM;
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memcpy(fw->img, src, fw->len);
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fw->phys = dma_map_single(fw->device->dev, fw->img, len, DMA_TO_DEVICE);
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if (dma_mapping_error(fw->device->dev, fw->phys)) {
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kfree(fw->img);
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return -EFAULT;
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}
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sg_init_one(&fw->mem.sgl, fw->img, len);
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@ -1624,7 +1624,7 @@ r535_gsp_wpr_meta_init(struct nvkm_gsp *gsp)
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meta->magic = GSP_FW_WPR_META_MAGIC;
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meta->revision = GSP_FW_WPR_META_REVISION;
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meta->sysmemAddrOfRadix3Elf = gsp->radix3.mem[0].addr;
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meta->sysmemAddrOfRadix3Elf = gsp->radix3.lvl0.addr;
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meta->sizeOfRadix3Elf = gsp->fb.wpr2.elf.size;
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meta->sysmemAddrOfBootloader = gsp->boot.fw.addr;
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@ -1919,8 +1919,9 @@ nvkm_gsp_sg(struct nvkm_device *device, u64 size, struct sg_table *sgt)
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static void
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nvkm_gsp_radix3_dtor(struct nvkm_gsp *gsp, struct nvkm_gsp_radix3 *rx3)
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{
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for (int i = ARRAY_SIZE(rx3->mem) - 1; i >= 0; i--)
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nvkm_gsp_mem_dtor(gsp, &rx3->mem[i]);
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nvkm_gsp_sg_free(gsp->subdev.device, &rx3->lvl2);
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nvkm_gsp_mem_dtor(gsp, &rx3->lvl1);
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nvkm_gsp_mem_dtor(gsp, &rx3->lvl0);
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}
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/**
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@ -1960,36 +1961,60 @@ static int
|
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nvkm_gsp_radix3_sg(struct nvkm_gsp *gsp, struct sg_table *sgt, u64 size,
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struct nvkm_gsp_radix3 *rx3)
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{
|
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u64 addr;
|
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struct sg_dma_page_iter sg_dma_iter;
|
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struct scatterlist *sg;
|
||||
size_t bufsize;
|
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u64 *pte;
|
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int ret, i, page_idx = 0;
|
||||
|
||||
for (int i = ARRAY_SIZE(rx3->mem) - 1; i >= 0; i--) {
|
||||
u64 *ptes;
|
||||
size_t bufsize;
|
||||
int ret, idx;
|
||||
ret = nvkm_gsp_mem_ctor(gsp, GSP_PAGE_SIZE, &rx3->lvl0);
|
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if (ret)
|
||||
return ret;
|
||||
|
||||
bufsize = ALIGN((size / GSP_PAGE_SIZE) * sizeof(u64), GSP_PAGE_SIZE);
|
||||
ret = nvkm_gsp_mem_ctor(gsp, bufsize, &rx3->mem[i]);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = nvkm_gsp_mem_ctor(gsp, GSP_PAGE_SIZE, &rx3->lvl1);
|
||||
if (ret)
|
||||
goto lvl1_fail;
|
||||
|
||||
ptes = rx3->mem[i].data;
|
||||
if (i == 2) {
|
||||
struct scatterlist *sgl;
|
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// Allocate level 2
|
||||
bufsize = ALIGN((size / GSP_PAGE_SIZE) * sizeof(u64), GSP_PAGE_SIZE);
|
||||
ret = nvkm_gsp_sg(gsp->subdev.device, bufsize, &rx3->lvl2);
|
||||
if (ret)
|
||||
goto lvl2_fail;
|
||||
|
||||
for_each_sgtable_dma_sg(sgt, sgl, idx) {
|
||||
for (int j = 0; j < sg_dma_len(sgl) / GSP_PAGE_SIZE; j++)
|
||||
*ptes++ = sg_dma_address(sgl) + (GSP_PAGE_SIZE * j);
|
||||
}
|
||||
} else {
|
||||
for (int j = 0; j < size / GSP_PAGE_SIZE; j++)
|
||||
*ptes++ = addr + GSP_PAGE_SIZE * j;
|
||||
// Write the bus address of level 1 to level 0
|
||||
pte = rx3->lvl0.data;
|
||||
*pte = rx3->lvl1.addr;
|
||||
|
||||
// Write the bus address of each page in level 2 to level 1
|
||||
pte = rx3->lvl1.data;
|
||||
for_each_sgtable_dma_page(&rx3->lvl2, &sg_dma_iter, 0)
|
||||
*pte++ = sg_page_iter_dma_address(&sg_dma_iter);
|
||||
|
||||
// Finally, write the bus address of each page in sgt to level 2
|
||||
for_each_sgtable_sg(&rx3->lvl2, sg, i) {
|
||||
void *sgl_end;
|
||||
|
||||
pte = sg_virt(sg);
|
||||
sgl_end = (void *)pte + sg->length;
|
||||
|
||||
for_each_sgtable_dma_page(sgt, &sg_dma_iter, page_idx) {
|
||||
*pte++ = sg_page_iter_dma_address(&sg_dma_iter);
|
||||
page_idx++;
|
||||
|
||||
// Go to the next scatterlist for level 2 if we've reached the end
|
||||
if ((void *)pte >= sgl_end)
|
||||
break;
|
||||
}
|
||||
|
||||
size = rx3->mem[i].size;
|
||||
addr = rx3->mem[i].addr;
|
||||
}
|
||||
|
||||
return 0;
|
||||
if (ret) {
|
||||
lvl2_fail:
|
||||
nvkm_gsp_mem_dtor(gsp, &rx3->lvl1);
|
||||
lvl1_fail:
|
||||
nvkm_gsp_mem_dtor(gsp, &rx3->lvl0);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
@ -2021,7 +2046,7 @@ r535_gsp_fini(struct nvkm_gsp *gsp, bool suspend)
|
||||
sr = gsp->sr.meta.data;
|
||||
sr->magic = GSP_FW_SR_META_MAGIC;
|
||||
sr->revision = GSP_FW_SR_META_REVISION;
|
||||
sr->sysmemAddrOfSuspendResumeData = gsp->sr.radix3.mem[0].addr;
|
||||
sr->sysmemAddrOfSuspendResumeData = gsp->sr.radix3.lvl0.addr;
|
||||
sr->sizeOfSuspendResumeData = len;
|
||||
|
||||
mbox0 = lower_32_bits(gsp->sr.meta.addr);
|
||||
|
||||
@ -177,7 +177,7 @@ config DRM_PANEL_ILITEK_IL9322
|
||||
|
||||
config DRM_PANEL_ILITEK_ILI9341
|
||||
tristate "Ilitek ILI9341 240x320 QVGA panels"
|
||||
depends on OF && SPI
|
||||
depends on SPI
|
||||
select DRM_KMS_HELPER
|
||||
select DRM_GEM_DMA_HELPER
|
||||
depends on BACKLIGHT_CLASS_DEVICE
|
||||
|
||||
@ -22,8 +22,9 @@
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
@ -421,7 +422,7 @@ static int ili9341_dpi_prepare(struct drm_panel *panel)
|
||||
|
||||
ili9341_dpi_init(ili);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ili9341_dpi_enable(struct drm_panel *panel)
|
||||
@ -691,7 +692,7 @@ static int ili9341_dpi_probe(struct spi_device *spi, struct gpio_desc *dc,
|
||||
* Every new incarnation of this display must have a unique
|
||||
* data entry for the system in this driver.
|
||||
*/
|
||||
ili->conf = of_device_get_match_data(dev);
|
||||
ili->conf = device_get_match_data(dev);
|
||||
if (!ili->conf) {
|
||||
dev_err(dev, "missing device configuration\n");
|
||||
return -ENODEV;
|
||||
@ -714,18 +715,18 @@ static int ili9341_probe(struct spi_device *spi)
|
||||
|
||||
reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(reset))
|
||||
dev_err(dev, "Failed to get gpio 'reset'\n");
|
||||
return dev_err_probe(dev, PTR_ERR(reset), "Failed to get gpio 'reset'\n");
|
||||
|
||||
dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(dc))
|
||||
dev_err(dev, "Failed to get gpio 'dc'\n");
|
||||
return dev_err_probe(dev, PTR_ERR(dc), "Failed to get gpio 'dc'\n");
|
||||
|
||||
if (!strcmp(id->name, "sf-tc240t-9370-t"))
|
||||
return ili9341_dpi_probe(spi, dc, reset);
|
||||
else if (!strcmp(id->name, "yx240qv29"))
|
||||
return ili9341_dbi_probe(spi, dc, reset);
|
||||
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static void ili9341_remove(struct spi_device *spi)
|
||||
|
||||
@ -93,7 +93,7 @@ int ttm_tt_create(struct ttm_buffer_object *bo, bool zero_alloc)
|
||||
*/
|
||||
if (bdev->pool.use_dma_alloc && cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) {
|
||||
page_flags |= TTM_TT_FLAG_DECRYPTED;
|
||||
drm_info(ddev, "TT memory decryption enabled.");
|
||||
drm_info_once(ddev, "TT memory decryption enabled.");
|
||||
}
|
||||
|
||||
bo->ttm = bdev->funcs->ttm_tt_create(bo, page_flags);
|
||||
|
||||
@ -204,6 +204,7 @@ int vmw_bo_pin_in_start_of_vram(struct vmw_private *dev_priv,
|
||||
VMW_BO_DOMAIN_VRAM,
|
||||
VMW_BO_DOMAIN_VRAM);
|
||||
buf->places[0].lpfn = PFN_UP(bo->resource->size);
|
||||
buf->busy_places[0].lpfn = PFN_UP(bo->resource->size);
|
||||
ret = ttm_bo_validate(bo, &buf->placement, &ctx);
|
||||
|
||||
/* For some reason we didn't end up at the start of vram */
|
||||
|
||||
@ -991,7 +991,7 @@ static int vmw_event_fence_action_create(struct drm_file *file_priv,
|
||||
}
|
||||
|
||||
event->event.base.type = DRM_VMW_EVENT_FENCE_SIGNALED;
|
||||
event->event.base.length = sizeof(*event);
|
||||
event->event.base.length = sizeof(event->event);
|
||||
event->event.user_data = user_data;
|
||||
|
||||
ret = drm_event_reserve_init(dev, file_priv, &event->base, &event->event.base);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user